C8051F300DK Silicon Laboratories Inc, C8051F300DK Datasheet - Page 8

DEV KIT F300/301/302/303/304/305

C8051F300DK

Manufacturer Part Number
C8051F300DK
Description
DEV KIT F300/301/302/303/304/305
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F300DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F30x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F300
Silicon Family Name
C8051F30x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F300/001/002
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1246
C8051F30x-DK
5.5. Serial Interface (J5)
A RS232 transceiver circuit and DB-9 (J5) connector are provided on the target board to facilitate serial connec-
tions to UART0 of the C8051F300. The TX, RX, RTS and CTS signals of UART0 may be connected to the DB-9
connector and transceiver by installing shorting blocks on headers J3.
5.6. Analog I/O (J6)
Several of the C8051F300 target device’s port pins are connected to the J6 terminal block. Refer to Table 4 for the
J6 terminal block connections. Install a shorting block on J7[2-3] to connect the AIN6 input to the P0.6 pin of the
target device.
5.7. Low-Pass Filter (J7)
The C8051F300 target board features a low-pass filter that may be connected to port pin P0.6. Install a shorting
block on J7[1-2] to connect the P0.6 pin of the target device to the low-pass filter input. The output of the low-pass
filter is routed to the PWM signal at J1[2]. The C8051F300 may be programmed to generate a PWM (Pulse-Width
Modulated) waveform which is then input to the low-pass filter to implement a user-controlled PWM digital-to-ana-
log converter. Refer to Applications Note “AN107: Implementing 16-Bit PWM Using the PCA” in the “documenta-
tion” directory on the CD-ROM for a discussion on generating a programmable dc voltage level with a PWM
waveform and low-pass filter.
8
J3[5–6]
J3[7–8]
J3[9–10] - Install shorting block to connect UART0 RTS (P0.2) to transceiver.
J3[11–12] - Install shorting block to connect UART0 CTS (P0.3) to transceiver.
- Install shorting block to connect UART0 TX (P0.4) to transceiver.
- Install shorting block to connect UART0 RX (P0.5) to transceiver.
Table 4. J6 Terminal Block Pin Descriptions
Pin #
1
2
3
4
P0.0 / Vref (Voltage Reference)
P0.1 / AIN1 (ADC input 1)
AIN6 (ADC input 6)
Rev. 0.5
GND (Ground)
Description

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