C8051T600DK Silicon Laboratories Inc, C8051T600DK Datasheet - Page 150
C8051T600DK
Manufacturer Part Number
C8051T600DK
Description
KIT DEV FOR C8051T60X MCU'S
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051T600DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051T60x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051T600, C8051T601, C8051T602, C8051T603, C8051T604, C8051T605
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1404
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C8051T600/1/2/3/4/5/6
25.1.4. Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)
In Mode 3, Timer 0 is configured as two separate 8-bit counter/timers held in TL0 and TH0. The coun-
ter/timer in TL0 is controlled using the Timer 0 control/status bits in TCON and TMOD: TR0, C/T0, GATE0,
and TF0. TL0 can use either the system clock or an external input signal as its timebase. The TH0 register
is restricted to a timer function sourced by the system clock or prescaled clock. TH0 is enabled using the
Timer 1 run control bit TR1. TH0 sets the Timer 1 overflow flag TF1 on overflow and thus controls the
Timer 1 interrupt.
Timer 1 is inactive in Mode 3. When Timer 0 is operating in Mode 3, Timer 1 can be operated in Modes 0,
1, or 2, but cannot be clocked by external signals nor set the TF1 flag and generate an interrupt. However,
the Timer 1 overflow can be used to generate baud rates for the SMBus and/or UART, and/or initiate ADC
conversions. While Timer 0 is operating in Mode 3, Timer 1 run control is handled through its mode set-
tings. To run Timer 1 while Timer 0 is in Mode 3, set the Timer 1 Mode as 0, 1, or 2. To disable Timer 1,
configure it for Mode 3.
150
/INT0
T0
Crossbar
Pre-scaled Clock
SYSCLK
IN0PL
GATE0
Figure 25.3. T0 Mode 3 Block Diagram
XOR
T0M
0
1
TR0
0
1
Rev. 1.2
TR1
G
A
T
E
1
C
T
1
/
M
T
1
1
TMOD
M
T
1
0
G
A
T
E
0
C
T
0
/
M
T
0
1
M
T
0
0
(8 bits)
(8 bits)
TH0
TL0
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Interrupt
Interrupt
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