C8051F336DK Silicon Laboratories Inc, C8051F336DK Datasheet - Page 109

DEV KIT FOR C8051F336

C8051F336DK

Manufacturer Part Number
C8051F336DK
Description
DEV KIT FOR C8051F336
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F336DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F33x
Interface Type
USB, UART
Operating Supply Voltage
7 V to 15 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F336
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1430
19. Oscillators and Clock Selection
C8051F336/7/8/9 devices include a programmable internal high-frequency oscillator, a programmable
internal low-frequency oscillator, and an external oscillator drive circuit. The internal high-frequency oscilla-
tor can be enabled/disabled and calibrated using the OSCICN and OSCICL registers, as shown in
Figure 19.1. The internal low-frequency oscillator can be enabled/disabled and calibrated using the
OSCLCN register. The system clock can be sourced by the external oscillator circuit or either internal oscil-
lator. Both internal oscillators offer a selectable post-scaling feature.
19.1. System Clock Selection
The CLKSL[1:0] bits in register CLKSEL select which oscillator source is used as the system clock.
CLKSL[1:0] must be set to 01b for the system clock to run from the external oscillator; however the exter-
nal oscillator may still clock certain peripherals (timers, PCA) when the internal oscillator is selected as the
system clock. The system clock may be switched on-the-fly between the internal oscillator, external oscilla-
tor, and Clock Multiplier so long as the selected clock source is enabled and has settled.
The internal high-frequency and low-frequency oscillators require little start-up time and may be selected
as the system clock immediately following the register write which enables the oscillator. The external RC
and C modes also typically require no startup time.
External crystals and ceramic resonators however, typically require a start-up time before they are settled
and ready for use. The Crystal Valid Flag (XTLVLD in register OSCXCN) is set to '1' by hardware when the
external crystal or ceramic resonator is settled. In crystal mode, to avoid reading a false XTLVLD, soft-
ware should delay at least 1 ms between enabling the external oscillator and checking XTLVLD.
VDD
Option 2
Option 3
XTAL2
XTAL2
Option 1
Option 4
XTAL2
10MΩ
Figure 19.1. Oscillator Options
XTAL1
XTAL2
OSCICL
Circuit
Low Frequency
Rev.1.0
Programmable
OSCLF
Input
Internal Clock
Generator
Oscillator
OSCXCN
OSC
EN
EN
OSCICN
OSCLD
n
n
C8051F336/7/8/9
CLKSEL
OSCLCN
OSCLF OSCLD
SYSCLK
109

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