DK-DEV-4SE530N Altera, DK-DEV-4SE530N Datasheet - Page 18
![KIT DEV STRATIX IV FPGA 4SE530](/photos/28/41/284157/dk-dev-4se530n_sml.jpg)
DK-DEV-4SE530N
Manufacturer Part Number
DK-DEV-4SE530N
Description
KIT DEV STRATIX IV FPGA 4SE530
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheet
1.DK-DEV-4SE530N.pdf
(54 pages)
Specifications of DK-DEV-4SE530N
Contents
Board, Cables, CD, DVD, Power Supply
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV E
Rohs Compliant
Yes
For Use With/related Products
EP4SE530
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2605
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
4–2
Factory Default Switch Settings
Stratix IV E FPGA Development Kit User Guide
This section shows the factory switch settings for the Stratix IV E FPGA development
board.
on the top side of the board.
Figure 4–1. Switch Locations and Default Settings on the Board Top
Figure 4–2
bottom side of the board.
Figure 4–1
shows the switch locations and the default position of each switch on the
HSMA_JTAG_EN
HSMB JTAG EN
J15
FAN
J12
J5
Board Settings
8
7
shows the switch locations and the default position of each switch
SW4
6
OPEN
5
4
3
2
1
SHUNT = 1.8V_QDR
QDRII_DRIVE
VCC_VCCL_SEL
J11
J7
J21
50
60
1 2 3
MIN
MAXII_JTAG_EN
SHUNT = 1.8V_RLD
J10
J18
PGM CONFIG SELECT
Enable
Clock
SW1
Chapter 4: Development Board Setup
© May 2010 Altera Corporation
MAX II DIPSWITCH
Factory Default Switch Settings
MSEL0
Rotary
Switch
J2
8
7
6
SW2
SW5
OPEN
5
USB
4
0
J4
3
2
1