ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 891

• Manufacturer Part Number: ATSAM3S-EK
• Description: KIT EVAL FOR ATSAM3S4C
• Manufacturer: Atmel
• Series: SAM3Sr
• Type: MCUr

Specifications of ATSAM3S-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex-M3
• Kit Contents: Board
• Features: TFT Colour LCD Display, SD/MMC Interface
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

36.7.12
Name:
Address:
Access:
This register acts as a double buffer for the UPR value. This prevents an unexpected automatic trigger of the update of syn-
chronous channels.
• UPRUPD: Update Period Update
Defines the wanted time between each update of the synchronous channels if automatic trigger of the update is activated
(UPDM = 1 or UPDM = 2 in
the synchronous channels.
6500C–ATARM–8-Feb-11
31
23
15
–
–
–
7
–
PWM Sync Channels Update Period Update Register
30
22
14
PWM_SCUPUPD
0x40020030
–
–
–
6
–
Write-only
“PWM Sync Channels Mode Register” on page
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
888). This time is equal to UPR+1 periods of
26
18
10
–
–
–
2
SAM3S Preliminary
UPRUPD
25
17
–
–
9
–
1
24
16
–
–
8
–
0
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