EVAL-ADUC7023QSPZ Analog Devices Inc, EVAL-ADUC7023QSPZ Datasheet - Page 78

• Manufacturer Part Number: EVAL-ADUC7023QSPZ
• Description: KIT DEV FOR ADUC7023 QUICK START
• Manufacturer: Analog Devices Inc
• Type: MCUr

Specifications of EVAL-ADUC7023QSPZ

• Contents: Board
• Silicon Manufacturer: Analog Devices
• Core Architecture: ARM
• Core Sub-architecture: ARM7TDMI
• Silicon Core Number: ADuC7023
• For Use With/related Products: ARM7TDMI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7023
IRQVEC Register
The IRQ interrupt vector register, IRQVEC, points to a memory
address containing a pointer to the interrupt service routine of
the currently active IRQ. This register should only be read when
an IRQ occurs and IRQ interrupt nesting has been enabled by
setting Bit 0 of the IRQCONN register.
IRQVEC Register
Name:
Address:
Default value:
Access:
IRQVEC
0xFFFF001C
0x00000000
Read only
Rev. B | Page 78 of 96
Table 90. IRQVEC MMR Bit Designations
Bit
31 to 23
22 to 7
6 to 2
1 to 0
Priority Registers
The IRQ interrupt vector register, IRQVEC, points to a memory
address containing a pointer to the interrupt service routine of
the currently active IRQ. This register should only be read when
an IRQ occurs and IRQ interrupt nesting has been enabled by
setting Bit 0 of the IRQCONN register.
Type
Read only
R/W
Read only
Reserved
Initial
Value
0
0
0
0
Description
Always read as 0.
IRQBASE register value.
Highest priority source. This is
a value between 0 and 21
representing the possible
interrupt sources. For example,
if the highest currently active
IRQ is Timer 2, then these bits
are [00100].
Reserved bits.