EZ80F910100KIT Zilog, EZ80F910100KIT Datasheet - Page 37

• Manufacturer Part Number: EZ80F910100KIT
• Description: KIT DEV FOR EZ80F91 W/C-COMPILER
• Manufacturer: Zilog
• Series: eZ80 Acclaim!®r
• Type: MCUr

Specifications of EZ80F910100KIT

• Contents: Dev. Board, Ethernet Module, Cable, Power Supply and Software
• For Use With/related Products: eZ80F91
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3388

//Init_IRDA
// Make sure to first set PD2 as a port bit, an output and set it Low.
PD_ALT1 &= 0xFC;
PD_ALT2 |= 0x03;
UART_LCTL0= 0x80;
BRG_DLRL0=0x2F;
BRG_DLRH0=0x00;
UART_LCTL0=0x00;
UART_FCTL0=0xC7;
UART_LCTL0=0x03;
IR_CTL = 0x03;
UM017001-0404
down the IrDA transceiver. Both pins must be set Low to enable this func-
tion.
The eZ80F91 Mini Enet Module features an Infrared Encoder/Decoder
register that configures the IrDA function. This register is located at
address
The Infrared Encoder/Decoder register contains three control bits. Bit 0
enables or disables the IrDA encoder/decoder block. Bit 1, if it is set,
enables received data to pass into the UART0 Receive FIFO data buffer.
Bit 2 is a test function that provides a loopback sequence from the TxD
pin to the RxD input.
Bit 1, the Receive Enable bit, is used to block data from filling up the
Receive FIFO when the eZ80F91 Mini Enet Module is transmitting data.
Because IrDA signal passes through the air as its transmission medium,
transmitted data can also be received. This Receive Enable bit prevents
this data from being received. After the eZ80F91 Mini Enet Module com-
pletes transmitting, this bit is changed to allow for incoming messages.
The code that follows provides an example of how this function is
enabled on the eZ80F91 Mini Enet Module.
0BFh
// PD0 = uart0tx, PD1 = uart0_rx
// Enable alternate function
// Select dlab to access baud rate generator
// Baud rate Masterclock/(16*baudrate)
// High byte of baud rate
// Disable dlab
// Clear tx fifo, enable fifo
// 8bit, N, 1 stop
// enable IRDA Encode/decode and Receive
// enable bit.
in the internal I/O register map.
PRELIMINARY
eZ80F91 Modular Development Kit
eZ80F91 Mini Enet Module
User Manual
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