C8051F350-TB Silicon Laboratories Inc, C8051F350-TB Datasheet - Page 227

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C8051F350-TB

Manufacturer Part Number
C8051F350-TB
Description
PROTOTYPINGBOARDWITH C8051F350
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F350-TB

Contents
Board
Processor To Be Evaluated
C8051F35x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F350
Silicon Family Name
C8051F35x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F350
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
24. Revision Specific Behavior
This chapter describes a functional difference between C8051F35x “REV B” and “REV C” or later devices.
The functionality of the VREF- pin differs between these revisions.
24.1. Revision Identification
The Lot ID Code on the top side of the device package can be used for decoding device revision informa-
tion. On C8051F350/2 devices, the revision letter is the first letter of the Lot ID Code. On C8051F351/3
devices, the revision letter is the first of the Lot ID Code. Figure 24.1 shows how to find the revision on the
top side of the device package.
24.1. VREF- pin
The required connection for the VREF- pin differs between the "REV B" and "REV C" and later devices.
On "REV B" devices, when the internal voltage reference is enabled, the VREF- pin is internally connected
to GND so the VREF- pin can be left unconnected externally.
On "REV C" and later devices, when the internal voltage reference is enabled, the VREF- pin is not inter-
nally connected to GND. The VREF- pin must be connected to GND externally for the voltage reference to
operate properly.
Revision Letter
C8051F350/2 Package Marking
C8051F350
CCNAVT
0450
Figure 24.1. Reading Package Marking
Rev. 1.1
Revision Letter
C8051F351/3 Package Marking
SILABS
F351
CCNAKX
0537+
C8051F350/1/2/3
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