MPC8536-RDK Freescale Semiconductor, MPC8536-RDK Datasheet - Page 851
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MPC8536-RDK
Manufacturer Part Number
MPC8536-RDK
Description
BOARD REF COMEXPRESS MPC8536
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr
Datasheets
1.MPC8536EBVTAVLA.pdf
(127 pages)
2.MPC8536EBVTAVLA.pdf
(1706 pages)
3.MPC8536-RDK.pdf
(2 pages)
Specifications of MPC8536-RDK
Contents
CSB1880, CSB1801, Cables, Documentation, Enclosure, Power Supply with cord
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 851 of 1706
- Download datasheet (15Mb)
14.5.3.6.31 Transmit Excessive Deferral Packet Counter (TEDF)
Figure 14-85
Table 14-89
14.5.3.6.32 Transmit Single Collision Packet Counter (TSCL)
Figure 14-86
Table 14-90
Freescale Semiconductor
Offset
Reset
Offset
Reset
20–31
20–31
0–19
0–19
Bits
Bits
W
W
R
R
0
0
describes the fields of the TEDF register.
describes the fields of the TSCL register.
Name
Name
TEDF
TSCL
describes the definition for the TEDF register.
describes the definition for the TSCL register.
Figure 14-85. Transmit Excessive Deferral Packet Counter Register Definition
—
—
Figure 14-86. Transmit Single Collision Packet Counter Register Definition
eTSEC1:0x2_46FC;
eTSEC1:0x2_46F8;
eTSEC3:0x2_66FC
eTSEC3:0x2_66F8
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Reserved
an excessive period of time (3036 byte times).
Reserved
Transmit single collision packet counter. Increments for each frame transmitted which experienced
exactly one collision during transmission.
Transmit excessive deferral packet counter. Increments for frames aborted which were deferred for
Table 14-89. TEDF Field Descriptions
Table 14-90. TSCL Field Descriptions
—
—
All zeros
All zeros
Description
Description
19 20
19 20
Enhanced Three-Speed Ethernet Controllers
TEDF
TSCL
Access: Read/Write
Access: Read/Write
14-103
31
31
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