Z8ICE001ZEM Zilog, Z8ICE001ZEM Datasheet - Page 6

Z8 PLUS EMULATOR/PROGRAMMER

Z8ICE001ZEM

Manufacturer Part Number
Z8ICE001ZEM
Description
Z8 PLUS EMULATOR/PROGRAMMER
Manufacturer
Zilog
Series
Z8 OTPr
Type
In-Circuit Emulator Systemr
Datasheet

Specifications of Z8ICE001ZEM

Contents
Emulator Board, Cables, Software and Documentation
For Use With/related Products
Zilog Z8Plus™ Microcontrollers
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-2033
Z8ICE001ZEM
Z8Plus Emulator
LIMITATIONS
1. Although
2. Clicking on the
3. RC oscillator emulation is not supported.
Z8E000/Z8E001
1. Analog Comparator Power-Up Glitch
6
57.6 K baud, the actual maximum usable rate may be
less due to limitations of the user’s hardware or
systems software setup. The maximum usable rate is
determined by the user’s tolerance of the frequency of
communication errors.
ICEBOX execution. If the application goes into
or
execution is by executing a Stop-Mode Recovery (as
defined by the user program). The user may also reset
the application using the emulator
button; however, doing so resets the entire ICEBOX.
family of devices powers the analog comparators off
while not in use. When the comparator is enabled, it
tends to exhibit glitches on the output until it
stabilizes. This condition can cause spurious interrupts
if the interrupts are enabled during this interval. If a
single command is used to enable the comparator and
the
glitches. The
edges are set. If the
allow these interrupts, the device immediately jumps
to the interrupt code. To avoid problems and
undesirable results, it is recommended that the user
observe the following precautions when enabling the
comparator.
a. The global interrupts should be disabled with the
HALT
DI
masked whenever switching from digital-to-
analog or analog-to-digital mode.
PB4
command, or the
interrupts, the interrupt logic registers the
GUI 3.00
mode, the only way to halt the emulator
IREQ
HALT
bits for both the rising and falling
and later support baud rates up to
IMASK
button does not always halt the
PB4
register is configured to
interrupts should be
MASTER RESET
The Z8E00X
STOP
2.
3. The
4. Select the
5. The ZDS command
6. The
b. The
c. Finally, the interrupts may be reenabled. This
WDT
bug that causes the watchdog timer to continue to run
in
(
emulating the code with the
enabling the watchdog just before programming an
OTP device. The Z8E00X devices are not affected by
this problem. It is an
the Z8E000 and Z8E001 devices.
option bit, only after programming the device and
verifying the code. From that point, select the
PROTECT
VERIFY
that the code is truly protected.
address
writing to the
This command should not be used for Z8Plus parts.
tailored to match Z8PE00X devices. These functions
do not perform exactly the same as for Z8E00X
devices. Specifically, the
level-triggered. On Z8E00X devices, operation does
not resume until the pin is released. The
emulator, like the Z8PE00X devices themselves,
counts up, not down, as on Z8E00X devices.
TCTLHI.7
HALT
cleared after the mode change is complete.
issue is due to an inherent design limitation which
affects both the Z8E00X and the emulator.
RC OSCILLATOR
WDT
in
one last time (this run should FAIL) to ensure
20h
IREQ
HALT
) is cleared. Work around this bug by
mode, even if the
and
option and program again. Finally, run
EPROM PROTECT/TEST MODE KILL
. This command prevents the user from
TCTLHI
bits for
mode
SMR
VECTOR RESET
emulation-only
functions of the emulator are
register to configure the
PB4
option bit is not available for
The Z8M001 ICEchip has a
SMR
(bits
WDT
is edge-triggered, not
DS008801-Z8X1299
WDT
1
limitation.
and
stopped and then
adds a jump at
in
4
WDT
) should be
HALT
EPROM
ZiLOG
WDT
of the
bit
.

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