R0E0200F1EMU00 Renesas Electronics America, R0E0200F1EMU00 Datasheet - Page 36

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R0E0200F1EMU00

Manufacturer Part Number
R0E0200F1EMU00
Description
DEV EMULATOR E200 MAIN BODY
Manufacturer
Renesas Electronics America
Series
SuperH®r
Type
In-Circuit Emulatorr
Datasheet

Specifications of R0E0200F1EMU00

Contents
Emulator Board, Cables, Software and Documentation
For Use With/related Products
SH7080
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
4. Reset Signals
Note: Do not break the user program when the _RES, _BREQ, or _WAIT signal is being low. A
5. Direct Memory Access Controller (DMAC)
6. Memory Access during User Program Execution
Table 3.2 Memory Access during User Program Execution
Table 3.3 Stopping Time by Memory Access (Reference)
Rev. 4.00 Feb. 18, 2009 Page 28 of 64
REJ10J1662-0400
The MCU reset signals are only valid during emulation started with clicking the GO or STEP-
type button. If these signals are enabled on the user system in command input wait state, they
are not sent to the MCU.
The DMAC operates even when the emulator is used. When a data transfer request is
generated, the DMAC executes DMA transfer.
During execution of the user program, memory is accessed by the following two methods, as
shown in table 3.2.
Method
H-UDI read/write
Short break
The method for accessing memory during execution of the user program is specified by using
the [Configuration] dialog box.
Method
H-UDI read/write
TIMEOUT error will occur. If the _BREQ or _WAIT signal is fixed to low during break,
a TIMEOUT error will occur at memory access.
Condition
Reading of one longword for the
internal RAM
Writing of one longword for the
internal RAM
Description
The stopping time of the user program is short because memory is
accessed by the dedicated bus master.
This function is not available in this emulator. (Do not set)
Stopping Time
Reading: Maximum three bus clock
cycles (Bφ)
Writing: Maximum two bus clock
cycles (Bφ)

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