IE-789835-NS-EM1 Renesas Electronics America, IE-789835-NS-EM1 Datasheet - Page 39

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IE-789835-NS-EM1

Manufacturer Part Number
IE-789835-NS-EM1
Description
BD EMU 78K0S UPD789832/33/34/35
Manufacturer
Renesas Electronics America
Datasheet

Specifications of IE-789835-NS-EM1

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(2) Signals input from the target system via a gate
Since the following signals are input via a gate, their signals show a delay compared to the µ PD789835
Subseries. Refer to Figure 4-2 Equivalent Circuit of Emulation Circuit 2.
• RESET signal
• Signals related to clock input
• SEL pin
• V
Probe side
(Target system)
(KR00 to KR07)
LCD0 to LCD87
CAP0 to CAP3
The X2 (CL2) and XT2 pins are not used in the IE-789835-NS-EM1.
The SEL pin is not used in the IE-789835-NS-EM1. The IE system is fixed to ceramic/crystal oscillation.
The V
the IE system.
ROUT
V
LC0
CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS
ROUT
pin
to V
Port 0
Port 1
Port 2
Port 3
Port 6
Port 8
LC4
pin is not used in the IE-789835-NS-EM1. This pin is connected to GND via a capacitor of 47 µ F in
Emulation circuit
Figure 4-1. Equivalent Circuit of Emulation Circuit 1
100 Ω
100 Ω
100 Ω
USR side
Check point block
(Through hole)
User’s Manual U16290EJ1V0UM
ICE side
SW2 to SW6
100 kΩ
1 MΩ
RD7.5SB2
(V
HC4066
LC0
only)
LV
CC
IE system side
Port 0
(KR00 to KR07)
Port 1
Port 2
Port 3
Port 6
Port 8
LCD0 to LCD87
V
CAP0 to CAP3
LC0
to V
LC4
37

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