AD8304-EVAL Analog Devices Inc, AD8304-EVAL Datasheet

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AD8304-EVAL

Manufacturer Part Number
AD8304-EVAL
Description
BOARD EVAL FOR AD8304
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8304-EVAL

Design Resources
Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056) Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
a
PRODUCT DESCRIPTION
The AD8304 is a monolithic logarithmic detector optimized for
the measurement of low frequency signal power in fiber optic
systems. It uses an advanced translinear technique to provide an
exceptionally large dynamic range in a versatile and easily used
form. Its wide measurement range and accuracy are achieved
using proprietary design techniques and precise laser trimming.
In most applications only a single positive supply, V
will be required, but 3.0 V to 5.5 V can be used, and certain
applications benefit from the added use of a negative supply,
V
altered to fit the available span. The low quiescent current and
chip disable features facilitate use in battery-operated applications.
The input current, I
scaled NPN transistor, connected in a feedback path around a
low offset JFET amplifier. The current-summing input node
operates at a constant voltage, independent of current, with a
default value of 0.5 V; this may be adjusted over a wide range,
including ground or below, using an optional negative supply.
An adaptive biasing scheme is provided for reducing the dark
current at very low light input levels. The voltage at Pin VPDB
applies approximately 0.1 V across the diode for I
rising linearly with current to 2.0 V of net bias at I
The input pin INPT is flanked by the guard pins VSUM that
track the voltage at the summing node to minimize leakage.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
N
FEATURES
Optimized for Fiber Optic Photodiode Interfacing
Eight Full Decades of Range
Single-Supply Operation (3.0 V– 5.5 V)
Complete and Temperature Stable
Accurate Laser-Trimmed Scaling:
Output Bandwidth of 10 MHz, 15 V/ s Slew Rate
1-, 2-, or 3-Pole Low-Pass Filtering at Output
Miniature 14-Lead Package (TSSOP)
Low Power: ~4.5 mA Quiescent Current (Enabled)
APPLICATIONS
High Accuracy Optical Power Measurement
Wide Range Baseband Log Compression
Versatile Detector for APC Loops
. When using low supply voltages, the log slope is readily
Law Conformance 0.1 dB from 1 nA to 1 mA
Logarithmic Slope of 10 mV/dB (at VLOG Pin)
Basic Logarithmic Intercept at 100 pA
Easy Adjustment of Slope and Intercept
PD
, flows in the collector of an optimally
PD
PD
= 100 pA,
= 10 mA.
P
, of 5 V
The default value of the logarithmic slope at the output VLOG is
accurately scaled to 10 mV/dB (200 mV/decade). The resistance
at this output is laser-trimmed to 5 kΩ, allowing the slope to be
lowered by shunting it with an external resistance; the addition
of a capacitor at this pin provides a simple low-pass filter. The
intermediate voltage VLOG is buffered in an output stage that can
swing to within about 100 mV of ground (or V
tive supply, V
± 20 mA. The slope can be increased using the buffer and a pair
of external feedback resistors. An accurate voltage reference of
2 V is also provided to facilitate the repositioning of the intercept.
Many operational modes are possible. For example, low-pass filters
of up to three poles may be implemented, to reduce the output
noise at low input currents. The buffer may also serve as a com-
parator, with or without hysteresis, using the 2 V reference, for
example, in alarm applications. The incremental bandwidth of
a translinear logarithmic amplifier inherently diminishes for small
input currents. At the 1 nA level, the AD8304’s bandwidth is
about 2 kHz, but this increases in proportion to I
maximum value of 10 MHz.
The AD8304 is available in a 14-lead TSSOP package and specified
for operation from –40°C to +85°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
160 dB Range (100 pA –10 mA)
VSUM
I
PD
6
3
4
5
VSUM
VPDB
INPT
FUNCTIONAL BLOCK DIAGRAM
P
, and provides a peak current drive capacity of
VNEG
1
VPS2
PDB
Logarithmic Converter
10
~10k
PWDN
COMPENSATION
TEMPERATURE
BIAS
2
ACOM
14
© Analog Devices, Inc., 2002
0.5V
VREF
AD8304
VPS1
12
5k
N
www.analog.com
) and the posi-
PD
AD8304
VOUT
11
up to a
13
7
8
9
VREF
VLOG
BFIN
BFNG

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AD8304-EVAL Summary of contents

Page 1

... V reference, for example, in alarm applications. The incremental bandwidth of a translinear logarithmic amplifier inherently diminishes for small input currents. At the 1 nA level, the AD8304’s bandwidth is about 2 kHz, but this increases in proportion to I maximum value of 10 MHz. ...

Page 2

... AD8304–SPECIFICATIONS Parameter Conditions INPUT INTERFACE Pin 4, INPT; Pin 3 and Pin 5, VSUM Specified Current Range Flows toward INPT Pin Input Node Voltage Internally preset; may be altered Temperature Drift –40°C < T Input Guard Offset Voltage V 2 PHOTODIODE BIAS Established between Pin 6, V ...

Page 3

... Model AD8304ARU AD8304ARU-REEL AD8304ARU-REEL7 AD8304-EVAL CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8304 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...

Page 4

... AD8304–Typical Performance Characteristics ( unless otherwise noted 1 –40 C, + –0.5V 1.4 N 1.2 –40 C 1.0 +25 C +85 C 0.8 0.6 0.4 0.2 0 100p 1n 10n 100n 1 INPUT – A TPC 1. V vs. I LOG 2 –40 C, + –0.5V 1.5 N –40 C 1.0 + 0.5 0 –0.5 +85 C +70 C –1.0 –1.5 – ...

Page 5

... TPC 11. Small Signal Response of Buffer vs. I LOG –10 –20 –30 –40 –50 –60 – 10M TPC 12. Small Signal Response of Buffer vs. Frequency LOG Operating as Two-Pole Filter –5– AD8304 10n 100n 1 10 100 1m INPUT CURRENT – A LOG GAIN = 2 2 10k 100k ...

Page 6

... AD8304 2 1.5 1.0 0.5 MEAN + 3 0 MEAN – 3 –0.5 –1.0 –1.5 –2.0 100p 1n 10n 100n 1 10 INPUT – A TPC 13. Logarithmic Conformance Error Distribution (3 σ to Either Side of Mean MEAN + MEAN –1 MEAN – –2 –3 –4 –5 100p 1n 10n 100n 1 10 INPUT – A TPC 14. Logarithmic Conformance Error Distribution (3 σ ...

Page 7

... TPC 21. Distribution of Logarithmic Intercept, Sample 1000 202 204 TPC 22. Distribution of Input Guard Offset Voltage (V INPT –7– 160 140 120 100 100 120 LOGARITHMIC INTERCEPT – pA 180 160 140 120 100 –20 – INPUT GUARD OFFSET – mV – Sample 1000 SUM AD8304 140 20 ...

Page 8

... For the AD8304 operating in its default mode, its I corresponds responsivity of 0.9 A/W. Thus, an optical power would generate: V LOG (2) Note that when using the AD8304 in optical applications, the interpretation of V power, the logarithmic slope remains 10 mV/dB at this output. is called Z This can be a little confusing since a decibel change on the is trimmed to Y optical side has a different meaning than on the electrical side ...

Page 9

... Pin VREF. In conventional translinear log amps, the summing node is gener- ally held at ground potential, but that condition is not readily realized in a single-supply part. To address this, the AD8304 also supports the use of an optional negative supply voltage, V Pin VNEG. For least –0.5 V the summing node can N be connected to ground potential ...

Page 10

... R1 Figure 1, which is necessary to stabilize the system over the full range of currents, affects bandwidth at all values of I Later signal processing blocks also limit the maximum value. TPC 7 shows ac response curves for the AD8304 at eight repre- sentative currents of 100 mA, using 1000 pF. The values for R1 and C1 ensure stability over 1 the full 160 dB dynamic range ...

Page 11

... I = × ×  log   – REF   I  R  Z × and AD8304 165 25 50 165 25 50 165 25 50 165  R × LOG    LOG 24.9 18.2 25.5 16.2 13.3 24.9 16.5 12.4   +  ...

Page 12

... VREF VREF 7 particular diode, limited mainly by its series resistance. To address 0.5V this matter, the AD8304 provides for the diode a bias that varies linearly with the current. This voltage appears at Pin VPDB, and VLOG 8 varies from 0.6 V (reverse-biasing the diode by 0.1 V) for I ...

Page 13

... A 1nF R1 750 CONNECT With the summing node at ground, the AD8304 may now be used as a voltage-input log amp, simply by inserting a suitably scaled resistor from the voltage source to the INPT Pin. The logarith- is unchanged, PD mic accuracy for small voltages is limited by the offset of the JFET op amp, appearing between this pin and VSUM ...

Page 14

... RB and RE) at high input currents. There- fore advisable to set these to zero. While this will not model V = –0.5 NEG the AD8304 precisely safer than using possibly high default values for these parameters. The low current model parameters may also need consideration. Note that no attempt is made –3 ...

Page 15

... V OUT The buffer is essentially an uncommitted op amp that can be used to support the operation of the AD8304 in a variety of ways. It can be completely disconnected from the signal chain when not needed. Figure 15 shows its use as an inverting amplifier; this changes the polarity of the slope. The output can either be repositioned to all positive values by applying a fraction the BFIN Pin, or range negative when using a negative supply ...

Page 16

... PDB BIAS VREF VPDB ~10k 0.5V VSUM INPT 5k VSUM TEMPERATURE COMPENSATION VNEG ACOM VOUT Figure 16. Calibrated Level Comparator VPS2 PWDN VPS1 AD8304 PDB BIAS VREF VPDB 6 ~10k 0.5V VSUM 3 INPT 4 5k VSUM TEMPERATURE 5 COMPENSATION 1 14 VNEG ACOM VOUT V (–0.5V TO –5V) N Figure 17. Multidecade Current Source – ...

Page 17

... Programmable Multidecade Current Source The AD8304 supports a wide variety of general (nonoptical) applications. For example, the need frequently arises in test equipment to provide an accurate current that can be varied over many decades. This can be achieved using a logarithmic amplifier as the measuring device in an inverse function loop, as illustrated in Figure 16 ...

Page 18

... Figure 21. Configuration for Noise Spectral Density Measurement Evaluation Board An evaluation board is available for the AD8304, the schematic for which is shown in Figure 22, and the two board sides are shown in Figure 23 and Figure 24. It can be configured for a wide variety of experiments. The board is factory set for Photocon- ductive Mode with a buffer gain of unity, providing a slope of 10 mV/dB and an intercept of 100 pA ...

Page 19

... N SW1, R10 Device Enable: When SW1 is in the “0” position, the PWDN Pin is connected to ground and the AD8304 is in its normal operating mode. R1, R2 Buffer Amplifier Gain/Slope Adjustment: The logarithmic slope of the AD8304 can be altered using the buffer’s gain-setting resistors, R1 and R2 ...

Page 20

... Revision History Location 8/02—Data Sheet changed from REV REV. A. Edits to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 New TPC Edits to TPC 7 caption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Changes to TPC Edits to USING THE AD8304 section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Changes to Figure Edits to Table Edits to Table III . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 New Figure Changes to Figure Changes to Table OUTLINE DIMENSIONS (RU-14) Dimensions shown in millimeters 5 ...

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