EVAL-ADUC7020QS Analog Devices Inc, EVAL-ADUC7020QS Datasheet - Page 24
![KIT DEV FOR ADUC7020/7022](/photos/9/29/92900/eval-aduc7020qs_sml.jpg)
EVAL-ADUC7020QS
Manufacturer Part Number
EVAL-ADUC7020QS
Description
KIT DEV FOR ADUC7020/7022
Manufacturer
Analog Devices Inc
Datasheet
1.USB-I2CLIN-CONV-Z.pdf
(96 pages)
Specifications of EVAL-ADUC7020QS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
EVAL-ADUC7020QS-U2
- Current page: 24 of 96
- Download datasheet (2Mb)
ADuC7019/20/21/22/24/25/26/27/28/29
ADuC7026/ADuC7027
Table 13. Pin Function Descriptions (ADuC7026/ADuC7027)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Mnemonic
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
ADC10
GND
ADCNEG
DAC0/ADC12
DAC1/ADC13
DAC2/ADC14
DAC3/ADC15
TMS
REF
BM/P0.0/CMP
P4.6/AD14/PLAO[14]
P4.7/AD15/PLAO[15]
P0.1/PWM2
OUT
DAC0/ADC12
DAC1/ADC13
DAC2/ADC14
DAC3/ADC15
/PLAI[7]/MS0
ADCNEG
GND
P2.3/AE
ADC10
H
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
/BLE
TMS
REF
TDI
10
11
12
13
14
15
16
17
18
19
20
Figure 15. 80-Lead LQFP Pin Configuration (ADuC7026/ADuC7027)
1
2
3
4
5
6
7
8
9
Single-Ended or Differential Analog Input 4.
Single-Ended or Differential Analog Input 5.
Single-Ended or Differential Analog Input 6.
Single-Ended or Differential Analog Input 7.
Single-Ended or Differential Analog Input 8.
Single-Ended or Differential Analog Input 9.
Single-Ended or Differential Analog Input 10.
Ground Voltage Reference for the ADC. For optimal performance, the analog power supply
should be separated from IOGND and DGND.
Bias Point or Negative Analog Input of the ADC in Pseudo Differential Mode. Must be connected
to the ground of the signal to convert. This bias point must be between 0 V and 1 V.
DAC0 Voltage Output/Single-Ended or Differential Analog Input 12. DAC outputs are not
present on the ADuC7027.
DAC1 Voltage Output/Single-Ended or Differential Analog Input 13. DAC outputs are not
present on the ADuC7027.
DAC2 Voltage Output/Single-Ended or Differential Analog Input 14. DAC outputs are not
present on the ADuC7027.
DAC3 Voltage Output/Single-Ended or Differential Analog Input 15. DAC outputs are not
present on the ADuC7027.
Description
JTAG Test Port Input, Test Mode Select. Debug and download access.
PIN 1
INDICATOR
Rev. C | Page 24 of 96
ADuC7026/
ADuC7027
(Not to Scale)
TOP VIEW
60 P1.2/SPM2/PLAI[2]
59 P1.3/SPM3/PLAI[3]
58 P1.4/SPM4/PLAI[4]/IRQ2
57 P1.5/SPM5/PLAI[5]/IRQ3
56 P4.1/AD9/PLAO[9]
55 P4.0/AD8/PLAO[8]
54 IOV
53 IOGND
52 P1.6/SPM6/PLAI[6]
51 P1.7/SPM7/PLAO[0]
50 P2.2/RS/PWM0
49 P2.1/WS/PWM0
48 P2.7/PWM1
47 P3.7/AD7/PWM
46 P3.6/AD6/PWM
45 XCLKI
44 XCLKO
43 P0.7/ECLK/XCLK/SPM8/PLAO[4]
42 P2.0/SPM9/PLAO[5]/CONV
41 IRQ1/P0.5/ADC
DD
L
/MS3
L
SYNC
TRIP
BUSY
H
/PLAO[7]
/PLAO[6]
/PLAI[14]
/PLAI[15]
/PLAO[2]/MS2
START
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