AD9540-VCO/PCB Analog Devices Inc, AD9540-VCO/PCB Datasheet - Page 20

• Manufacturer Part Number: AD9540-VCO/PCB
• Description: BOARD EVAL CLK GEN SYNTH 48LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9540-VCO/PCB

• Module/board Type: Evaluation Board
• For Use With/related Products: AD9540 with VCO
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD9540
DDS AND DAC
The precision frequency division within the device is
accomplished using DDS technology. The DDS can control the
digital phase relationships by clocking a 48-bit accumulator.
The incremental value loaded into the accumulator, known as
the frequency tuning word, controls the overflow rate of the
accumulator. Similar to a sine wave completing a 2π radian
revolution, the overflow of the accumulator is cyclical in nature
and generates a fundamental frequency according to
The instantaneous phase of the sine wave is therefore the output
of the phase accumulator block. This signal can be phase-offset
by programming an additive digital phase that is added to each
phase sample coming out of the accumulator.
These instantaneous phase values are then piped through a
phase-to-amplitude conversion (sometimes called an angle-to-
amplitude conversion or AAC) block. This algorithm follows a
COS(x) relationship, where x is the phase coming out of the
phase offset block, normalized to 2π.
=
2
48
( ×
)
{0
≤
W
≤
2
47
}
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Finally, the amplitude words are piped to a 10-bit DAC. Because
the DAC is a sampled data system, the output is a reconstructed
sine wave that needs to be filtered to take high frequency images
out of the spectrum. The DAC is a current steering DAC that is
AVDD referenced. To get a measurable voltage output, the DAC
outputs must be terminated through a load resistor to AVDD,
typically 50 Ω. At positive full scale, IOUT sinks no current and
the voltage drop across the load resistor is 0. However, the IOUT
output sinks the programmed full-scale output current of the
DAC, causing the maximum output voltage drop across the load
resistor. At negative full-scale, the situation is reversed and IOUT
sinks the full-scale current (and generates the maximum drop
across the load resistor), while IOUT sinks no current (and
generates no voltage drop). At midscale, the outputs sink equal
amounts of current, generating equal voltage drops.