EVAL-AD7667CB Analog Devices Inc, EVAL-AD7667CB Datasheet
![no-image](/images/manufacturer_photos/0/0/57/analog_devices_inc_sml.jpg)
EVAL-AD7667CB
Specifications of EVAL-AD7667CB
Related parts for EVAL-AD7667CB
EVAL-AD7667CB Summary of contents
Page 1
FEATURES 2.5 V internal reference: typical drift 3 ppm/°C Guaranteed max drift 15 ppm/°C Throughput: 1 MSPS (Warp mode) 800 kSPS (Normal mode) 666 kSPS (Impulse mode) INL: ±2.0 LSB max (±0.0038% of full scale) 16-bit resolution with no missing ...
Page 2
... Power Dissipation versus Throughput .................................... 20 Conversion Control.................................................................... 21 REVISION HISTORY Revision 0: Initial Version. Digital Interface.......................................................................... 22 Parallel Interface......................................................................... 22 Serial Interface ............................................................................ 22 Master Serial Interface............................................................... 23 Slave Serial Interface .................................................................. 24 Microprocessor Interfacing....................................................... 26 Application Hints ........................................................................... 27 Bipolar and Wider Input Ranges .............................................. 27 Layout .......................................................................................... 27 Evaluating the AD7667’s Performance .................................... 27 Outline Dimensions ....................................................................... 28 Ordering Guide .......................................................................... 28 Rev Page ...
Page 3
SPECIFICATIONS Table 2. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2 5.25 V, unless otherwise noted. Parameter RESOLUTION ANALOG INPUT Voltage Range Operating Input Voltage Analog Input CMRR Input Current 1 Input Impedance THROUGHPUT ...
Page 4
AD7667 Parameter DIGITAL INPUTS Logic Levels DIGITAL OUTPUTS 5 Data Format Pipeline Delay POWER SUPPLIES Specified Performance AVDD DVDD OVDD 8 Operating Current 9 AVDD 10 AVDD ...
Page 5
TIMING SPECIFICATIONS Table 3. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2 5.25 V, unless otherwise noted. Parameter Refer to Figure 33 and Figure 34 Convert Pulse Width Time between Conversions (Warp Mode/Normal Mode/Impulse ...
Page 6
AD7667 Table 4. Serial Clock Timings in Master Read after Convert DIVSCLK[1] DIVSCLK[0] SYNC to SCLK First Edge Delay Minimum Internal SCLK Period Minimum Internal SCLK Period Maximum Internal SCLK HIGH Minimum Internal SCLK LOW Minimum SDOUT Valid Setup Time ...
Page 7
ABSOLUTE MAXIMUM RATINGS 1 Table 5. AD7667 Stress Ratings Parameter Rating TEMP , REF, REFBUFIN, AVDD + 0 INGND, REFGND to AGND Ground Voltage Differences AGND, DGND, OGND ±0.3 V Supply Voltages AVDD, DVDD, ...
Page 8
AD7667 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions 1 Pin No. Mnemonic Type 1, 36, 41, 42 AGND AVDD WARP DI 7 IMPULSE DI 4 BYTESWAP DI 5 OB/2C ...
Page 9
Pin No. Mnemonic Type DI/O RDC/SDIN 17 OGND P 18 OVDD P 19 DVDD P 20 DGND SDOUT DI/O SCLK 23 D10 or DO SYNC 24 D11 or ...
Page 10
AD7667 1 Pin No. Mnemonic Type 45 TEMP AO 46 REFBUFIN AI/O 47 PDREF DI 48 PDBUF Analog Input; AI/O = Bidirectional Analog Analog Output Digital Input; DI/O = Bidirectional Digital; DO ...
Page 11
DEFINITIONS OF SPECIFICATIONS Integral Nonlinearity Error (INL) Linearity error refers to the deviation of each individual code from a line drawn from negative full scale through positive full scale. The point used as negative full scale occurs ½ LSB before ...
Page 12
AD7667 TYPICAL PERFORMANCE CHARACTERISTICS 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 16384 32768 CODE Figure 5. Integral Nonlinearity vs. Code 0.5 1.0 POSITIVE INL (LSB) Figure 6. Typical Positive INL Distribution ...
Page 13
CODE IN HEX Figure 11. Histogram of 261,120 Conversions Input at the Code Transition 0 f –20 ...
Page 14
AD7667 92 ENOB 91 SNR 90 S/[N+ –55 –35 – TEMPERATURE (°C) Figure 17. SNR, S/[N+D], and ENOB vs. Temperature –100 THD –105 SECOND HARMONIC –110 THIRD HARMONIC –115 –55 –35 –15 5 ...
Page 15
OVDD = 2.7V @ 85°C 45 OVDD = 2.7V @ 25° OVDD = 5V @ 85°C 20 OVDD = 5V @ 25° 100 150 C (pF) L Figure 23. ...
Page 16
AD7667 CIRCUIT INFORMATION IN REF REFGND 32,768C INGND The AD7667 is a very fast, low power, single supply, precise 16-bit analog-to-digital converter (ADC). The AD7667 features different modes to optimize performance according to the applications. In Warp mode, the part ...
Page 17
Transfer Functions Using the OB/ 2C digital input, the AD7667 offers two output codings: straight binary and twos complement. The LSB size is V /65536, which is about 38.15 µV. The AD7667’s ideal REF transfer characteristic is shown in Figure ...
Page 18
AD7667 TYPICAL CONNECTION DIAGRAM Figure 26 shows a typical connection diagram for the AD7667. Analog Input Figure 27 shows an equivalent circuit of the input structure of the AD7667. The two diodes, D1 and D2, provide ESD protection for the ...
Page 19
The noise generated by the driver amplifier needs to be kept as low as possible in order to preserve the SNR and transition noise performance of the AD7667. The noise coming from the driver is filtered by the AD7667 ...
Page 20
AD7667 For applications that use multiple AD7667s more effective to use the internal buffer to buffer the reference voltage. Care should be taken with the voltage reference’s temperature coefficient, which directly affects the full-scale accuracy if this parameter ...
Page 21
CONVERSION CONTROL Figure 33 shows the detailed timing diagrams of the conversion process. The AD7667 is controlled by the CNVST signal, which initiates conversion. Once initiated, it cannot be restarted or aborted, even by the power-down input PD, until the ...
Page 22
AD7667 DIGITAL INTERFACE The AD7667 has a versatile digital interface; it can be interfaced with the host system by using either a serial or a parallel interface. The serial interface is multiplexed on the parallel data bus. The AD7667 digital ...
Page 23
MASTER SERIAL INTERFACE Internal Clock The AD7667 is configured to generate and provide the serial data clock SCLK when the EXT/ INT pin is held LOW. The AD7667 also generates a SYNC signal to indicate to the host when the ...
Page 24
AD7667 SLAVE SERIAL INTERFACE External Clock The AD7667 is configured to accept an externally supplied serial data clock on the SCLK pin when the EXT/ INT pin is held HIGH. In this mode, several methods can be used to read ...
Page 25
External Discontinuous Clock Data Read After Conversion Though the maximum throughput cannot be achieved using this mode the most recommended of the serial slave modes. Figure 41 shows the detailed timing diagrams of this method. After a conversion ...
Page 26
AD7667 MICROPROCESSOR INTERFACING The AD7667 is ideally suited for traditional dc measurement applications supporting a microprocessor, and for ac signal processing applications interfacing to a digital signal processor. The AD7667 is designed to interface either with a parallel 8-bit or ...
Page 27
... OGND is connected to the digital system ground. EVALUATING THE AD7667’S PERFORMANCE A recommended layout for the AD7667 is outlined in the EVAL-AD7667 evaluation board package includes a fully assembled and tested evaluation board, documentation, and software for controlling the board from a PC via the Rev Page AD7667 evaluation board for the AD7667 ...
Page 28
... ORDERING GUIDE Model AD7667AST AD7667ASTRL AD7667ACP AD7667ACPRL 1 EVAL-AD7667CB 2 EVAL-CONTROL BRD2 1 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD2 for evaluation/demonstration purposes. 2 This board allows control and communicate with all Analog Devices evaluation boards ending in the CB designators. ...