Z8018100ZCO Zilog, Z8018100ZCO Datasheet - Page 46
![no-image](/images/manufacturer_photos/0/7/729/zilog_sml.jpg)
Z8018100ZCO
Manufacturer Part Number
Z8018100ZCO
Description
Z80181 SAC APPLICATION BOARD
Manufacturer
Zilog
Datasheet
1.Z8018110FEG.pdf
(74 pages)
Specifications of Z8018100ZCO
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Z8018100ZC0
Z8018100ZC0
Z8018100ZC0
- Current page: 46 of 74
- Download datasheet (594Kb)
Zilog
Data Bus Direction
Table 4 shows the state of the SAC’s data bus when in SAC
bus master condition.
I/O And Memory Transactions
Z80181 Data Bus
(REME Bit = 0)
Z80181 Data Bus
(REME Bit = 1)
Interrupt Acknowledge Transaction
Z80181 Data Bus
(REME Bit = 0)
Z80181 Data Bus
(REME Bit = 1)
2-46
I/O
Write To
On-Chip
Peripherals Peripherals Peripheral Peripheral
(SCC/CTC/ (SCC/CTC/
PIA1/PIA2) PIA1/PIA2)
Out
Out
Intack For
On-Chip
Peripheral
(SCC/CTC)
Z
Out
Table 4. Data Bus Direction (Z181 Is Bus Master)
I/O
Read From
On-Chip
Z
Out
Intack For
Off-Chip
Peripheral
In
In
PS009701-0301
I/O
Write To
Off-Chip
Out
Out
I/O
Read From To
Off-Chip
In
In
Write
Memory
Out
Out
Read
From
Memory
In
In
S
MART
Refresh
Z
Z
A
CCESS
C
DS971800500
ONTROLLER
Z80181
Idle
Mode
Z
Z
Z80181
SAC
™
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