KS8695P-EVAL Micrel Inc, KS8695P-EVAL Datasheet - Page 30

• Manufacturer Part Number: KS8695P-EVAL
• Description: BOARD EVAL EXPERIMENT KS8695P
• Manufacturer: Micrel Inc

Specifications of KS8695P-EVAL

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 576-1002

Factory Test Pins
Note:
1. I = Input.
August 2005
KS8695P
O = Output.
O/I = Output in normal mode; input pin during reset.
M17
T17
N17
P17
R17
E15
E14
Pin
Pin
M4
F7
F4
TICTESTENN
TESTREQB
TESTREQA
WRSTPLS
ERWEN0/
TESTACK
ERWEN1/
ERWEN2/
ERWEN3/
B0SIZE0
B0SIZE1
TESTEN
EROEN/
WLED0/
WLED1/
TEST1
TEST2
Name
Name
I/O Type
I/O Type
O/I
O/I
O/I
O
O
O
O
I
I
I
(1)
(1)
Description
Normal mode: External I/O and ROM/SRAM/FLASH output enable: Active low.
When asserted, this signal controls the output enable port of the specified memory
device.
During reset: Watchdog timer reset polarity setting. WRSTPLS=0, active low;
WRSTPLS = 1, active high. No default.
External I/O and ROM/SRAM/FLASH write byte enable: Active low. When asserted,
the ERWENx controls the byte write enable of the memory device (except SDRAM).
ARM CPU test signal (factory reserved test signal).
External I/O and ROM/SRAM/FLASH write byte enable: Active low. When asserted,
the ERWENx controls the byte write enable of the memory device (except SDRAM).
ARM CPU test signal (factory reserved test signal).
External I/O and ROM/SRAM/FLASH write byte enable: Active low. When asserted,
the ERWENx controls the byte write enable of the memory device except SDRAM).
ARM CPU test signal (factory reserved test signal).
External I/O and ROM/SRAM/FLASH write byte enable. Active low. When asserted,
the ERWENx controls the byte write enable of the memory device (except SDRAM).
ARM CPU test signal (factory reserved test signal).
Normal mode: WAN LED indicator 0: Programmable via WAN misc. Control register
bits [2:0].
000 = Speed; 001 = Link; 010 = Full/half duplex; 011 = Collision;
100 = TX/RX activity; 101 = Full-duplex collision; 110 = Link/Activity.
During reset: Bank 0 data access size. Bank 0 is used for the boot program.
B0SiZE[1:0] are used to specify the size of the bank 0 data bus width as follows:
‘01’ = one byte, ‘10’ = half-word, ‘11’ = one word, and ‘00’ = reserved.
Normal mode: WAN LED indicator 1: Programmable via WAN Misc. Control register
bits [6:4].
000 = Speed; 001 = Link; 010 = Full/half duplex; 011 = Collision;
100 = TX/RX activity; 101 = Full-duplex collision; 110 = Link/Activity.
During reset: Bank 0 data access size. Bank 0 is used for the boot program.
B0SIZE[1:0] are used to specify the size of the bank 0 data bus width as follows:
‘01’ = one byte, ‘10’ = half-word, ‘11’ = one word, and ‘00’ = reserved.
Description
Factory test signal. Pull-down or direct connect to GND required.
Factory test signal. No connect for normal operation.
Factory test signal. No connect for normal operation.
30
M9999-081805
Micrel