KS8995MA-EVAL Micrel Inc, KS8995MA-EVAL Datasheet - Page 76

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KS8995MA-EVAL

Manufacturer Part Number
KS8995MA-EVAL
Description
BOARD EVAL EXPERIMENT KS8995MA
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8995MA-EVAL

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
576-1018
Semptember 2008
Reset Circuit Diagram
Micrel recommends the following discrete reset circuit as shown in Figure 22 when powering up the KS8895MA device.
For the application where the reset circuit signal comes from another device (e.g., CPU, FPGA, etc), we recommend
the reset circuit as shown in Figure 23.
At power-on-reset, R, C, and D1 provide the necessary ramp rise time to reset the Micrel device. The reset out from
CPU/FPGA provides warm reset after power up. It is also recommended to power up the VDD core voltage earlier than
VDDIO voltage. At worst case, the both VDD core and VDDIO voltages should come up at the same time.
Figure 23. Recommended Circuit for Interfacing with CPU/FPGA Reset
KS8995MA
RST
Figure 22. Recommended Reset Circuit
KS8995MA
D1
D1: 1N4148
RST
10µF
VCC
C
76
D1
R
10k
D2
10µF
VCC
D1, D2: 1N4148
C
R
10k
RST_OUT_n
CPU/FPGA
M9999-091508

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