ZLP128ICE01ZEM Zilog, ZLP128ICE01ZEM Datasheet - Page 93

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ZLP128ICE01ZEM

Manufacturer Part Number
ZLP128ICE01ZEM
Description
EMULATOR CRIMZON Z8 ZLP12840
Manufacturer
Zilog

Specifications of ZLP128ICE01ZEM

Interface Type
RS-232, Ethernet, USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3829
PS024410-0108
Table 41. Interrupt Types, Sources, and Vectors
When more than one interrupt is pending, priorities are resolved by a programmable
priority encoder controlled by the Interrupt Priority Register. An interrupt machine cycle
activates when an interrupt request is granted. As a result, all subsequent interrupts are
disabled, and the Program Counter and Status Flags are saved. The cycle then branches to
the Program Memory vector location reserved for that interrupt. All Crimzon ZLP12840
MCU interrupts are vectored through locations in the program memory. This memory
location and the next byte contain the 16-bit address of the interrupt service routine for
that particular interrupt request. To accommodate polled interrupt systems, interrupt inputs
are masked, and the Interrupt Request Register is polled to determine which of the
interrupt requests require service.
An interrupt resulting from AN1 is mapped into IRQ2, and an interrupt from AN2 is
mapped into IRQ0. Interrupts IRQ2 and IRQ0 can be rising, falling, or both edge
triggered. These interrupts are programmable. The software can poll to identify the state of
the pin.
Name
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
Source
P32, UART Rx
P33, UART Tx, BRG,
SMR Event
P31
Timer 16
Timer 8
Low-Voltage Detection 10,11
P R E L I M I N A R Y
Vector Location
(Program Memory) Comments
0,1
2,3
4,5
6,7
8,9
External (P32), Rising, Falling
Edge Triggered
External (P33), Falling Edge
Triggered
External (P31), Rising, Falling
Edge Triggered
Internal
Internal
Internal
Product Specification
ZLP12840 OTP MCU
Interrupts
87

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