C8051F124-TB Silicon Laboratories Inc, C8051F124-TB Datasheet - Page 39

• Manufacturer Part Number: C8051F124-TB
• Description: BOARD PROTOTYPING W/C8051F124
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F124-TB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3.
Table 3.1. Global DC Electrical Characteristics
(C8051F120/1/2/3 and C8051F130/1/2/3)
–40 to +85 °C, 100 MHz System Clock unless otherwise specified.
Analog Supply Voltage
Analog Supply Current
Analog Supply Current with
analog sub-systems inactive
Analog-to-Digital Supply
Delta (|V
Digital Supply Voltage
Digital Supply Current with
CPU active
Digital Supply Current with
CPU inactive (not accessing
Flash)
Digital Supply Current (shut-
down)
Digital Supply RAM Data
Retention Voltage
SYSCLK (System Clock)
Specified Operating Temper-
ature Range
Notes:
1. Analog Supply AV+ must be greater than 1 V for
2. SYSCLK is the internal device clock. For operational speeds in excess of 30 MHz, SYSCLK must be derived
3. SYSCLK must be at least 32 kHz to enable debugging.
Global DC Electrical Characteristics
from the Phase-Locked Loop (PLL).
DD
Parameter
– AV+|)
1
2,3
Internal REF, ADCs, DACs, Com-
SYSCLK = 0 to 50 MHz
SYSCLK = 0 to 50 MHz
SYSCLK > 50 MHz
parators all active
Internal REF, ADCs, DACs, Com-
parators all disabled, oscillator
disabled
SYSCLK > 50 MHz
V
V
V
V
V
V
V
V
Oscillator not running
V
V
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
, AV+ = 2.7 to 3.6 V
, AV+ = 3.0 to 3.6 V
= 3.0 V, Clock = 100 MHz
= 3.0 V, Clock = 50 MHz
= 3.0 V, Clock = 1 MHz
= 3.0 V, Clock = 32 kHz
= 3.0 V, Clock = 100 MHz
= 3.0 V, Clock = 50 MHz
= 3.0 V, Clock = 1 MHz
= 3.0 V, Clock = 32 kHz
Conditions
Rev. 1.4
V
DD
monitor to operate.
C8051F120/1/2/3/4/5/6/7
Min
–40
2.7
3.0
2.7
3.0
—
—
—
—
—
—
—
0
0
C8051F130/1/2/3
Typ
3.0
3.3
1.7
0.2
3.0
3.3
0.4
0.4
1.5
65
35
33
40
20
15
—
—
—
1
Max
+85
100
3.6
3.6
0.5
3.6
3.6
50
—
—
—
—
—
—
Units
MHz
MHz
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
°C
V
V
V
V
V
V
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