HS7750RKCI01H Renesas Electronics America, HS7750RKCI01H Datasheet - Page 17

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HS7750RKCI01H

Manufacturer Part Number
HS7750RKCI01H
Description
ON CHIP DEBUG EMULATOR
Manufacturer
Renesas Electronics America
Datasheets

Specifications of HS7750RKCI01H

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 2.5 lists the combinations of conditions that can be set under Break Condition 1, 2, 3, 4, 5, 6,
7, 8.
Table 2.5 Dialog Boxes for Setting Break Conditions
Address bus condition
(Address)
Data bus condition
(Data)
ASID condition (ASID)
Read/write
specification
Data access
Before/after execution
Sequential break
LDTLB instruction
break
Internal I/O access
break
Note: O: Can be set in the dialog box.
Note: If the BL bit of the SR register is 1, do not use BREAKPOINTs.
The SH7750R E10A emulator has sequential break functions. Table 2.6 shows the sequential
break conditions.
X: Cannot be set in the dialog box.
If a break is specified for an address that is close to an address whose instruction generates
a manual reset, a manual reset may be generated instead of a break. Therefore, to ensure
the performance of a break, specify a break for an address that is four addresses before the
address whose instruction generates an exception.
[Break
Condition 1, 5]
Dialog Box
O
O
O
O
O
O
O
X
X
[Break
Condition 2, 3,
4, 6] Dialog Box
O
O
O
O
O
O
X
X
X
Dialog Box
[Break
Condition 7]
Dialog Box
O
X
X
X
X
X
X
X
X
[Break
Condition 8]
Dialog Box
O
X
X
X
X
X
X
X
X
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