HS7750RKCI01H Renesas Electronics America, HS7750RKCI01H Datasheet - Page 21

• Manufacturer Part Number: HS7750RKCI01H
• Description: ON CHIP DEBUG EMULATOR
• Manufacturer: Renesas Electronics America

Specifications of HS7750RKCI01H

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2.2.4
Set the JTAG clock (TCK) frequency to lower than the frequency of the SH7750R peripheral
module clock (CKP).
2.2.5
1. When an odd address is set, the next lowest even address is used.
2. A BREAKPOINT is accomplished by replacing instructions. Accordingly, it can be set only
3. During step execution, a BREAKPOINT is disabled.
4. Conditions set at Break Condition 3 are disabled when an instruction to which a
5. When execution resumes from the address where a BREAKPOINT is specified, single-step
6. When a BREAKPOINT is set to the slot instruction of a delayed branch instruction, the PC
7. When the [Normal] option is selected in the [Memory area] group box in the [General] page of
8. When the [Physical] option is selected in the [Memory area] group box in the [General] page
to the internal RAM area. However, a BREAKPOINT cannot be set to the following
addresses:
In addition, do not perform memory write, BREAKPOINT, or download even if the memory
space can only be written by the MMU.
BREAKPOINT has been set is executed. Do not set a BREAKPOINT to an instruction in
which Break Condition 3 is satisfied.
execution is performed at the address before execution resumes. Therefore, realtime operation
cannot be performed.
value becomes an illegal value. Accordingly, do not set a BREAKPOINT to the slot
instruction of a delayed branch instruction.
the [Configuration] dialog box, a BREAKPOINT is set to a physical address or a virtual
address according to the SH7750R MMU state during command input when the VPMAP_SET
command setting is disabled. The ASID value of the SH7750R PTEH register during
command input is used. When VPMAP_SET command setting is enabled, a BREAKPOINT
is set to a physical address into which address translation is made according to the VP_MAP
table. However, for addresses out of the range of the VP_MAP table, the address to which a
BREAKPOINT is set depends on the SH7750R MMU state during command input. Even
when the VP_MAP table is modified after BREAKPOINT setting, the address translated at
BREAKPOINT setting is valid.
of the [Configuration] dialog box, a BREAKPOINT is set to a physical address. A
BREAKPOINT is set after disabling the SH7750R MMU during program execution. After
An address whose memory content is H'003B
An area other than the CS0 to CS6 areas and the internal RAM area
An instruction in which Break Condition 3 is satisfied
A slot instruction of a delayed branch instruction
Notes on Using the JTAG Clock (TCK)
Notes on Setting the [Breakpoint] Dialog Box
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