DK-PCI-2C35N Altera, DK-PCI-2C35N Datasheet - Page 21
![PCI KIT W/CYCLONE II EP2C35N](/photos/9/31/93174/dk-pci-2c35n_sml.jpg)
DK-PCI-2C35N
Manufacturer Part Number
DK-PCI-2C35N
Description
PCI KIT W/CYCLONE II EP2C35N
Manufacturer
Altera
Series
Cyclone® IIr
Type
FPGA: PCI Development Kitr
Datasheet
1.DK-PCI-2C35N.pdf
(40 pages)
Specifications of DK-PCI-2C35N
Contents
Dev Board, Quartus®II Web Edition, Cables, Accessories, Reference Designs and Demos
For Use With/related Products
Cyclone ll 2C35N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1733
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Figure 2–5. PCI Master Write Transaction (Demo Tab)
Altera Corporation
May 2005
Latency Timer Configuration Register (Debug Tab)
In this example, the data source is the PCI board and the destination is the
system memory, employing a user-configured value for the latency timer.
You can verify this setup in the Command Information section of the kit’s
application.
1.
2.
3.
4.
5.
Click the Debug tab.
Select Master Write from the Commands box.
Keep the Address Offset setting of 0x0000000.
Keep the following values in the Address/Size box:
●
●
In the Configuration Registers list, select Lat Timer.
PCI Development Kit, Cyclone II Edition Getting Started User Guide
Transfer Length: 4,096
Iterations: 2
Core Version a.b.c variable
Getting Started
2–11