DP83865-EB National Semiconductor, DP83865-EB Datasheet - Page 15

• Manufacturer Part Number: DP83865-EB
• Description: BOARD EVALUATION DP83865
• Manufacturer: National Semiconductor

Specifications of DP83865-EB

• Main Purpose: Interface, Ethernet
• Utilized Ic / Part: DP83865
• Lead Free Status / RoHS Status: Not applicable / Not applicable

1.0 Pin Description
Pin #
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
RX_CLK
IO_VDD
VSS
TX_CLK/RGMII_SEL1
TX_ER
TX_EN/TXEN_ER
CORE_VDD
VSS
TXD7
TXD6
TXD5
TXD4
IO_VDD
VSS
TXD3/TX3
TXD2/TX2
CORE_VDD
VSS
TXD1/TX1
TXD0/TX0
IO_VDD
VSS
Data Sheet Pin Name
(Continued)
Table 1.
15
Ground Ground: Connect to common ground plane.
Ground Ground: Connect to common ground plane.
Ground Ground: Connect to common ground plane.
Ground Ground: Connect to common ground plane.
Ground Ground: Connect to common ground plane.
Output
Output
Power
Power
Power
Power
Power
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Receive Clock/ Receive Byte Clock 1: Con-
nect to MAC chip through a single 50
ance trace. This output is capable of driving 35
pf load and is not intended to drive connectors,
cables, backplanes or multiple traces. This ap-
plies if the part is in 100 Mbps mode or 1000
Mbps mode.
I/O VDD: (Digital) Connect to 2.5V or 3.3V. The
VDD_SEL pin must be tied accordingly.
Transmit Clock: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF.
Transmit Error: Connect to MAC chip through a
single 50
typical input capacitance of 6 pF.
Transmit Enable: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF.
Core VDD: (Digital) Connect to 1.8V.
Transmit Data 7: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF.
Transmit Data 6: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
Transmit Data 5: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
Transmit Data 4: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
I/O VDD: (Digital) Connect to 2.5V or 3.3V. The
VDD_SEL pin must be tied accordingly.
Transmit Data 3: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
Transmit Data 2: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
Core VDD: (Digital) Connect to 1.8V.
Transmit Data 1: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
Transmit Data 0: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
I/O VDD: (Digital) Connect to 2.5V or 3.3V. The
VDD_SEL pin must be tied accordingly.
Connection / Comment
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
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imped-