FS-9019 Digi International, FS-9019 Datasheet
![no-image](/images/manufacturer_photos/0/1/193/digi_international_sml.jpg)
FS-9019
Specifications of FS-9019
Related parts for FS-9019
FS-9019 Summary of contents
Page 1
... JTAG-Booster for AMD Alchemy Solutions Processors P.O: Box 1103 Kueferstrasse 8 Tel. +49 (7667) 908-0 sales@fsforth.de • D-79200 Breisach, Germany • D-79206 Breisach, Germany • Fax +49 (7667) 908-200 • http://www.fsforth.de ...
Page 2
... FS FORTH-SYSTEME GmbH Postfach 1103, D-79200 Breisach, Germany Release of Document: November 22, 2004 Author: Dieter Fögele Filename: JTAG_alchemyb.doc Program Version: 4.xx All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of FS FORTH-SYSTEME GmbH. 2 JTAG_alchemyb.doc ...
Page 3
Table of Contents 1. General ............................................................................................................ 5 1.1. Ordering Information.............................................................................. 7 1.2. System Requirements ........................................................................... 7 1.3. Contents of Distribution Disk ................................................................. 8 1.4. Connecting your PC to the target system .............................................. 9 1.5. First Example with AMD Alchemy Solutions ...
Page 4
AMD Alchemy Solutions Processors 5.4. De-Installation version 5.x/6.x: .............................................................93 4 JTAG_alchemyb.doc ...
Page 5
General The programs JTAu1000.EXE, JTAu1550.EXE use the IEEE 1149.1 JTAG port of the AMD Alchemy Solutions Processors in conjunction with the small JTAG-Booster: • to program data into flash memory • to verify and read the contents of a ...
Page 6
AMD Alchemy Solutions Processors For latest documentation please refer to the file README.TXT on the distribution disk. 6 JTAG_alchemyb.doc ...
Page 7
Ordering Information The following related products are available • 9019 JTAG-Booster AMD Alchemy Solutions Processors, 3.3V, AMD Au1000, Au1100, Au1500, Au1550 DOS/Win9x/WinNT/Win2000/WinXP delivered with adapter type 285 and additional cable with single strands TK02206 1.2. System Requirements To successfully ...
Page 8
AMD Alchemy Solutions Processors 1.3. Contents of Distribution Disk • JTAu1000.EXE Tool for AMD Alchemy Solutions Au1000 Processor JTAu1000.OVL • JTAu1000.INI Template configuration file for AMD Alchemy Solutions Au1000 Processor. See chapter 1.11 "Initialization file JTAuxxxx.INI" • JTAu1100.EXE Tool for ...
Page 9
... Pin 7 is the target’s TDO pin and is connected to the JTAG-Booster’s TDI pin. The 3.3V version of the JTAG-Booster (FS part number 285) is delivered together with this package. Don’t use the 5V version of the JTAG-Booster (FS part number 227) with a 3.3V target. Don’t apply 5V to the 3.3V version of the JTAG-Booster! Your target must be able to power the JTAG-Booster, it draws about 100mA ...
Page 10
AMD Alchemy Solutions Processors The utility is started with the general command line format: JTAGxxx JTAuxxxx /function [filename] [/option_1] ... [/option_n]. Note that the function must be the first argument followed (if needed) by the filename. If you want to ...
Page 11
... LPT1 of your PC and target power is on. Typing JTAu1000 /P MYAPP.BIN at the DOS prompt results in the following output: JTAu1000 --- JTAG utility for AMD Alchemy Solutions Au1000 Processor Copyright FS FORTH-SYSTEME GmbH, Breisach Version 4.xx of mm/dd/yyyy (1) Configuration loaded from file JTAu1000.INI (2) Target: Generic Target ...
Page 12
... The position of the JTAG instruction register of the AMD Alchemy Solutions Au1000 Processor is assumed to be zero, if not specified in the command line (see option /IROFFS=). (9) The real length of the boundary scan register is displayed here and compared with the boundary scan register length of a AMD Alchemy Solutions Au1000 Processor ...
Page 13
... LPT1 of your PC and target power is on. Typing JTAu1100 /P MYAPP.BIN at the DOS prompt results in the following output: JTAu1100 --- JTAG utility for AMD Alchemy Solutions Au1100 Processor Copyright FS FORTH-SYSTEME GmbH, Breisach Version 4.xx of mm/dd/yyyy (1) Configuration loaded from file JTAu1100.INI (2) Target: Generic Target ...
Page 14
... The position of the JTAG instruction register of the AMD Alchemy Solutions Au1100 Processor is assumed to be zero, if not specified in the command line (see option /IROFFS=). (9) The real length of the boundary scan register is displayed here and compared with the boundary scan register length of a AMD Alchemy Solutions Au1100 Processor ...
Page 15
... LPT1 of your PC and target power is on. Typing JTAu1500 /P MYAPP.BIN at the DOS prompt results in the following output: JTAu1500 --- JTAG utility for AMD Alchemy Solutions Au1500 Processor Copyright FS FORTH-SYSTEME GmbH, Breisach Version 4.xx of mm/dd/yyyy (1) Configuration loaded from file JTAu1500.INI (2) Target: Generic Target ...
Page 16
... The position of the JTAG instruction register of the AMD Alchemy Solutions Au1500 Processor is assumed to be zero, if not specified in the command line (see option /IROFFS=). (9) The real length of the boundary scan register is displayed here and compared with the boundary scan register length of a AMD Alchemy Solutions Au1500 Processor ...
Page 17
... LPT1 of your PC and target power is on. Typing JTAu1550 /P MYAPP.BIN at the DOS prompt results in the following output: JTAu1550 --- JTAG utility for AMD Alchemy Solutions Au1550 Processor Copyright FS FORTH-SYSTEME GmbH, Breisach Version 4.xx of mm/dd/yyyy (1) Configuration loaded from file JTAu1550.INI (2) Target: Generic Target ...
Page 18
... The position of the JTAG instruction register of the AMD Alchemy Solutions Au1550 Processor is assumed to be zero, if not specified in the command line (see option /IROFFS=). (9) The real length of the boundary scan register is displayed here and compared with the boundary scan register length of a AMD Alchemy Solutions Au1550 Processor ...
Page 19
Trouble Shooting Avoid long distances between your Host-PC and the target. If you are using standard parallel extension cable, the JTAG-BOOSTER may not work. Don't use Dongles between the parallel port and the JTAG-BOOSTER. Switch off all special modes ...
Page 20
... Configuration file XYZ not found. The file specified with the option /INI= wasn't found. • Device offset out of range The value specified with the option /OFFSET= is greater than the size of the detected flash device. • Disk full Writing a output file was aborted as a result of missing disk space. ...
Page 21
Error: Pin-Name is an output only pin The specified pin cannot be sampled. Check the command line. Check the initialization file. • Error: Pin-Name is an input only pin The specified pin cannot be activated. Check the command line. ...
Page 22
AMD Alchemy Solutions Processors • " " is undefined Please check the syntax in your configuration file. (See chapter 1.11 “Initialization file JTAuxxxx.INI”). • LPTx not installed The LPT port specified with /LPTx cannot be found. Please check the LPT ...
Page 23
... The sum of all instruction register bits in the JTAG chain does not fit to the AMD Alchemy Solutions Processors. Check the target connection. Check the target CPU type. Check the settings for /IROFFS= and /CPUPOS there are several parts in the JTAG chain. JTAG_alchemyb.doc ...
Page 24
... The length of the boundary scan register of the selected part (if there are more than one in the chain) does not fit to the AMD Alchemy Solutions Processors. Check the target connection. Check the target CPU type. Check the settings for /IROFFS= and /CPUPOS there are several parts in the JTAG chain. 24 ...
Page 25
Initialization file JTAuxxxx.INI This file is used to define the default direction and level of all CPU signals. This file must be carefully adapted to your design with the AMD Alchemy Solutions Processors. The Target-Entry is used to identify ...
Page 26
AMD Alchemy Solutions Processors Sample File JTAu1000.INI: // Description file for AMD Au1000 Target: Generic Target, 2003/10/02 // Adapt this file carefully to your design!! // All chip select signals are set to output and inactive. // All signals should ...
Page 27
RD22 Inp // RD23 Inp // RD24 Inp // RD25 Inp // RD26 Inp // RD27 Inp // RD28 Inp // RD29 Inp // RD30 Inp // RD31 Inp // // The following pins are complete bidirectional pins. // The ...
Page 28
AMD Alchemy Solutions Processors RAD24 Out,Lo // RAD25 Out,Lo // RAD26 Out,Lo // RAD27 Out,Lo // RAD28 Out,Lo // RAD29 Out,Hi // RAD30 Out,Lo // RAD31 Out, Group 552: All pins in this group must be set to ...
Page 29
GPIO13 Inp // U3RTS# GPIO14 Inp // U3DTR# GPIO15 Inp // IRFIRSEL N0TXEN Inp // N0TXD0 Inp // N0TXD1 Inp // N0TXD2 Inp // N0TXD3 Inp // N0MDC Inp // N0MDIO Inp // N1TXEN Inp // GPIO24 N1TXD0 Inp // ...
Page 30
AMD Alchemy Solutions Processors SDD22 Inp // SDD23 Inp // SDD24 Inp // SDD25 Inp // SDD26 Inp // SDD27 Inp // SDD28 Inp // SDD29 Inp // SDD30 Inp // SDD31 Inp // SDCLK0 Out,Lo // SDCLK1 Out,Lo // ...
Page 31
ROE# Out,Hi // SRAM/IO/PCMCIA/FLASH/ROM/LCD Output Enable RCS0# Out,Hi // SRAM/IO/PCMCIA/FLASH/ROM/LCD Chip Select RCS1# Out,Hi // RCS2# Out,Hi // RCS3# Out, The following pins are output only pins. // Setting to input (tristate) one of these pins results in ...
Page 32
AMD Alchemy Solutions Processors // The following pins are input only. // Setting to output of one of these pins results in an error. // Declaration of the direction of these pins is optional. U0RXD Inp // UART0 receive U1RXD ...
Page 33
PWAIT# Inp // PCMCIA entend Cycle LWAIT# Inp // LCD Controller Chip Interface Extend Cycle EWAIT# Inp // SRAM/IO/PCMCIA/FLASH/ROM Extend Cycle JTAG_alchemyb.doc AMD Alchemy Solutions Processors 33 ...
Page 34
AMD Alchemy Solutions Processors Sample File JTAu1100.INI: // Description file for AMD Au1100 Target: Generic Target, 2003/10/02 // Adapt this file carefully to your design!! // All chip select signals are set to output and inactive. // All signals should ...
Page 35
RD22 Inp // RD23 Inp // RD24 Inp // RD25 Inp // RD26 Inp // RD27 Inp // RD28 Inp // RD29 Inp // RD30 Inp // RD31 Inp // // The following pins are complete bidirectional pins. // The ...
Page 36
AMD Alchemy Solutions Processors RAD24 Out,Lo // RAD25 Out,Lo // RAD26 Out,Lo // RAD27 Out,Lo // RAD28 Out,Lo // RAD29 Out,Hi // RAD30 Out,Lo // RAD31 Out, Group 666: All pins in this group must be set to ...
Page 37
GPIO14 Inp // U3DTR# GPIO15 Inp // IRFIRSEL N0TXEN Inp // GPIO24 N0TXD0 Inp // GPIO25 N0TXD1 Inp // GPIO26 N0TXD2 Inp // GPIO27 N0TXD3 Inp // GPIO28 N0MDC Inp // GPIO215 N0MDIO Inp // GPIO16 Inp // GPIO17 Inp ...
Page 38
AMD Alchemy Solutions Processors SDD7 Inp // SDD8 Inp // SDD9 Inp // SDD10 Inp // SDD11 Inp // SDD12 Inp // SDD13 Inp // SDD14 Inp // SDD15 Inp // SDD16 Inp // SDD17 Inp // SDD18 Inp // ...
Page 39
PIOR# Out,Hi // PCMCIA Read Cycle Indication POE# Out,Hi // PCMCIA Output Enable PREG# Inp // GPIO204 PCE1# Out,Hi // GPIO205 PCE2# Out,Hi // GPIO206 PWE# Inp // GPIO207 LRD0# Inp // GPIO200 LRD1# Inp // GPIO201 LWR0# Inp // ...
Page 40
AMD Alchemy Solutions Processors LCD_LEND Out,Lo // LCD Line End // The following pins are output only pins. // Setting to input (tristate) one of these pins results in an error. SDCS0# Out,Hi // Programmable Chip Select SDCS1# Out,Hi // ...
Page 41
IRDARX Inp // Serial IrDA input U3RXD Inp // UART3 receive ACDI Inp // AC-Link TDM input stream ACBCLK Inp // S1DIN N0CRS Inp // N0RXD0 Inp // N0RXD1 Inp // N0RXD2 Inp // N0RXD3 Inp // N0RXCLK Inp // ...
Page 42
AMD Alchemy Solutions Processors Sample File JTAu1500.INI: // Description file for AMD Alchemy Solutions Au1500 Processor Target: Generic Target, 2003/10/02 // Adapt this file carefully to your design!! // All chip select signals are set to output and inactive. // ...
Page 43
RD22 Inp // RD23 Inp // RD24 Inp // RD25 Inp // RD26 Inp // RD27 Inp // RD28 Inp // RD29 Inp // RD30 Inp // RD31 Inp // // The following pins are complete bidirectional pins. // The ...
Page 44
AMD Alchemy Solutions Processors RAD24 Out,Lo // RAD25 Out,Lo // RAD26 Out,Lo // RAD27 Out,Lo // RAD28 Out,Lo // RAD29 Out,Hi // RAD30 Out,Lo // RAD31 Out, Group 151: All pins in this group must be set to ...
Page 45
GPIO214 Inp // GPIO215 Inp // ACRST# Inp // AC-Link CODEC reset ACSYNC Inp // AC-Link fixed rate sample sync ACDO Inp // AC-Link TDM output stream U0TXD Inp // GPIO20 U3TXD Inp // GPIO23 GPIO13 Inp // U3RTS# GPIO14 ...
Page 46
AMD Alchemy Solutions Processors SDD15 Inp // SDD16 Inp // SDD17 Inp // SDD18 Inp // SDD19 Inp // SDD20 Inp // SDD21 Inp // SDD22 Inp // SDD23 Inp // SDD24 Inp // SDD25 Inp // SDD26 Inp // ...
Page 47
LWR0# Out,Hi // LCD controller chip interface write indicator LWR1# Out,Hi // LCD controller chip interface write indicator RBEN0# Out,Lo // SRAM/IO/PCMCIA/FLASH/ROM/LCD Byte Enable RBEN1# Out,Lo // RBEN2# Out,Lo // RBEN3# Out,Lo // RWE# Out,Hi // SRAM/IO/PCMCIA/FLASH/ROM/LCD Write Enable ROE# ...
Page 48
AMD Alchemy Solutions Processors PCI_AD15 Inp // PCI_AD16 Inp // PCI_AD17 Inp // PCI_AD18 Inp // PCI_AD19 Inp // PCI_AD20 Inp // PCI_AD21 Inp // PCI_AD22 Inp // PCI_AD23 Inp // PCI_AD24 Inp // PCI_AD25 Inp // PCI_AD26 Inp // ...
Page 49
SDA2 Out,Lo // SDA3 Out,Lo // SDA4 Out,Lo // SDA5 Out,Lo // SDA6 Out,Lo // SDA7 Out,Lo // SDA8 Out,Lo // SDA9 Out,Lo // SDA10 Out,Lo // SDA11 Out,Lo // SDA12 Out,Lo // RESETOUT# Out,Hi // Buffered Output of CPU ...
Page 50
AMD Alchemy Solutions Processors N0RXD3 Inp // N0RXCLK Inp // N0RXDV Inp // N0COL Inp // N0TXCLK Inp // N1CRS Inp // N1RXD0 Inp // N1RXD1 Inp // N1RXD2 Inp // N1RXD3 Inp // N1RXCLK Inp // N1RXDV Inp // ...
Page 51
Sample File JTAu1550.INI: // Description file for AMD Alchemy Solutions Au1550 Processor Target: Generic Target, 2004/11/19 // Adapt this file carefully to your design!! // All chip select signals are set to output and inactive. // All signals should be ...
Page 52
AMD Alchemy Solutions Processors RD26 Inp // RD27 Inp // RD28 Inp // RD29 Inp // RD30 Inp // RD31 Inp // // The following pins are complete bidirectional pins. // The direction of each pin can be set independent ...
Page 53
USBH0P Inp // USBH0M Inp // // Group 760: All pins in this group must be set to the same direction // These pins are bidirectional USBH1P Inp // USBH1M Inp // // Group 770: All pins in this group ...
Page 54
AMD Alchemy Solutions Processors N1TXEN Inp // GPIO24 N1TXD0 Inp // GPIO25 N1TXD1 Inp // GPIO26 N1TXD2 Inp // GPIO27 N1TXD3 Inp // GPIO28 N1MDC Inp // N1MDIO Inp // DDQ0 Inp // SDRAM Data Bus DDQ1 Inp // DDQ2 ...
Page 55
GPIO0 Inp // GPIO1 Inp // GPIO2 Inp // EXTCLK0 GPIO3 Inp // EXTCLK1 GPIO4 Inp // DMA_REQ0 GPIO5 Inp // DMA_REQ1 GPIO6 Inp // SMROMCKE GPIO7 Inp // GPIO8 Inp // GPIO9 Inp // U3CTS# GPIO10 Inp // U3DSR# ...
Page 56
AMD Alchemy Solutions Processors PCI_GNT2# Inp // PCI arbiter bus grant output PCI_GNT3# Inp // PCI arbiter bus grant output PCI_PERR# Inp // PCI parity error PCI_SERR# Inp // PCI system error PCI_AD0 Inp // PCI address/data PCI_AD1 Inp // ...
Page 57
PSC0_D0 Inp // PSC0_D1 Inp // PSC1_CLK Inp // PSC0 clock PSC1_SYNC0 Inp // PSC1_SYNC1 Inp // GPIO17 PSC1_D0 Inp // PSC1_D1 Inp // // The following pins are output only pins. // Setting to input (tristate) one of these ...
Page 58
AMD Alchemy Solutions Processors PCI_CLKO Out,Lo // PCI clock output // The following pins are input only. // Setting to output of one of these pins results in an error. // Declaration of the direction of these pins is optional. ...
Page 59
FWTOY# Inp // Firewall the TOY clock signal BOOT0 Inp // Boot Memory Select BOOT1 Inp // BOOT2 Inp // RESETIN# Inp // CPU Reset input TESTEN Inp // Test enable, should be pulled low TC0 Inp // Test Clock ...
Page 60
AMD Alchemy Solutions Processors 1.12. Supported flash devices Type JTAuxxxx /LIST [optionlist] to get a online list of all flash types which could be used with the /DEVICE= option. See separate file JTAG_V4xx_FLASHES.pdf to get a complete list of supported ...
Page 61
... When you start JTAuxxxx.EXE without any parameters the following help screen with all possible functions and options is displayed: JTAuxxxx --- JTAG utility for AMD Alchemy Solutions Processors Copyright © FS FORTH-SYSTEME GmbH, Breisach Version 4.xx of mm/dd/yyyy Programming of Flash-EPROMs and hardware tests on targets with the AMD Alchemy Solutions Processors ...
Page 62
... For demonstration purposes this software works with the Lattice ispLSI-Adapter, too. With the option /LATTICE you can simulate the speed achievable with the simple ispLSI-Adapter. 62 /CS2 /CS3 /BYTE-MODE /PAUSE /P /LATTICE /LPT1 /32BIT /16BIT /L= /FILE-OFFSET= /DELAY= /DEVICE-BASE= /DB= /CPUPOS= /DEVICE= /SERDAT= /SERDATI= /SPI /MWIRE /OUT= /INI= JTAG_alchemyb.doc /BIG /BM ...
Page 63
... This pin must be specified as output in the initialization file. /IROFFS= Specifies the position of the AMD Alchemy Solutions Processors instruction register within the JTAG chain. In most cases this option is not needed. Default: /IROFFS=0 /CPUPOS= Specifies the position of the AMD Alchemy Solutions Processors within the JTAG chain. Default: /CPUPOS=0 JTAG_alchemyb ...
Page 64
AMD Alchemy Solutions Processors 2.1. Program a Flash Device Usage: JTAuxxxx /P filename [optionlist] The specified file is programmed into the flash memory. The flash status is polled after programming of each cell (cell= bit, depending on ...
Page 65
To be prepared for future flash chips, the JTAG-Booster integrates support for flashes which contain the CFI (Common Flash Interface) information structure. The CFI support is activated by simply adding the option /CFI to the command line. The JTAG-Booster ...
Page 66
... AMD Alchemy Solutions Processors /OFFSET=hhhhhh The programming starts at an offset of hhhhhh relative to the start address of the flash device. If the offset is negative, the offset specifies an address relative to the end of the flash device. See also option /TOP Default: /OFFSET=0 Abbreviation: /O= /TOP If the option /TOP is used the option /OFFSET= specifies the address where the programming ends (plus one) instead of the starting address ...
Page 67
This options may be used to specify one or more chip select signals to the flash memory. The used chip selects must be defined as output and inactive in the initialization file. (See chapter 1.11 “Initialization ...
Page 68
AMD Alchemy Solutions Processors 2.2. Read a Flash Device to file Usage: JTAuxxxx /R filename [optionlist] The contents of a flash device is read and written to a file. The type of the flash device is normally detected by the ...
Page 69
... Reading of the flash memory starts at an offset of hhhhhh relative to the start address of the flash device. If the offset is negative, the offset specifies a address relative to the end of the flash device. See also option /TOP. Default: /OFFSET=0 Abbreviation: /O= /TOP If the option /TOP is used the option /OFFSET= specifies the address where reading ends (plus one) instead of the starting address ...
Page 70
... See function /P (Chapter 2.1) /CFI See function /P (Chapter 2.1) /8BIT /16BIT /32BIT See function /P (Chapter 2.1) /BYTE-MODE See function /P (Chapter 2.1) /NOMAN See function /P (Chapter 2.1) /DEVICE-BASE=hhhhhh See function /P (Chapter 2.1) /OFFSET=hhhhhh See function /P (Chapter 2.1) /TOP See function /P (Chapter 2.1) 70 JTAG_alchemyb.doc ...
Page 71
... See function /P (Chapter 2.1) /LENGTH=hhhhhh See function /P (Chapter 2.1) /NODUMP See function /P (Chapter 2.1) /CS0 /CS1 /CS2 /CS3 See function /P (Chapter 2.1) /NOWRSETUP See function /P (Chapter 2.1) Please note: In the function /V write cycles are needed to detect the type of the flash memory. ...
Page 72
... Default: /OFFSET=0 Abbreviation: /O= 3 /DEVICE-BASE=hhhhhh The device start address is used as an additional offset. This gives the function /DUMP the same behavior as function /P /V and /R. Default: /DEVICE-BASE=0 Abbreviation: /DB= /TOP If the option /TOP is used the option /OFFSET= specifies the address where ...
Page 73
Example: JTAuxxxx /DUMP This example makes a memory dump of the first 256 bytes of the Boot-EPROM. JTAG_alchemyb.doc AMD Alchemy Solutions Processors 73 ...
Page 74
AMD Alchemy Solutions Processors 2.5. Program a Serial Device (I²C/SPI/MicroWire) Usage: JTAuxxxx /PSER filename [/SERBIG] [optionlist] The specified file is programmed to a serial device (i.e. EEPROM) connected to pins of the CPU. Finally a complete verify is done. If ...
Page 75
... SPI/MicroWire devices. Default: /DEVICE-BASE=5000 Default: /DEVICE-BASE=500000 Default: /DEVICE-BASE=0 /OFFSET=hhhhhh The programming starts at an offset of hhhhhh relative to the start address of the serial device. Default: /OFFSET=0 Abbreviation: /O= /FILE-OFFSET=hhhhhh If FILE-OFFSET is specified, the first hhhhhh bytes of the file are skipped and not programmed to target. ...
Page 76
AMD Alchemy Solutions Processors /SERDAT=pin_name (I²C only) Specifies the CPU pin used for serial data input and output for an I²C device. Pin_name must specify a bidirectional pin otherwise an error message occurs. Instead of one bidirectional pin one pin ...
Page 77
... Specify this option, if there is a SPI device connected instead of a I²C device. /MWIRE Specify this option, if there is a MicroWire device connected instead of an I²C device. /DEVICE-BASE=hhhhhh See function /PSER (Chapter 2.5) /OFFSET=hhhhhh Reading of the serial device starts at an offset of hhhhhh relative to the start address of the serial device. Default: /OFFSET=0 Abbreviation: /O= /LENGTH=hhhhhh The number of read bytes must be specified otherwise an error message occurs ...
Page 78
AMD Alchemy Solutions Processors /SERDAT=pin_name See function /PSER (Chapter 2.5) /SERDATO=pin_name See function /PSER (Chapter 2.5) /SERDATI=pin_name See function /PSER (Chapter 2.5) /LSB1ST See function /PSER (Chapter 2.5) Example: JTAuxxxx /RSER EEPROM.CFG /SERCLK=GPIO0 /SERDAT=GPIO1 /L=100 This example reads 256 bytes ...
Page 79
... Specify this option, if there is a MicroWire device connected instead of an I²C device. /DEVICE-BASE=hhhhhh See function /PSER (Chapter 2.5) /OFFSET=hhhhhh See function /PSER (Chapter 2.5) /FILE-OFFSET=hhhhhh See function /PSER (Chapter 2.5) /LENGTH=hhhhhh See function /PSER (Chapter 2.5) /NODUMP See function /PSER (Chapter 2.5) /SERCS=pin_name See function /PSER (Chapter 2 ...
Page 80
AMD Alchemy Solutions Processors /SERCLK=pin_name See function /PSER (Chapter 2.5) /SERDAT=pin_name See function /PSER (Chapter 2.5) /SERDATO=pin_name See function /PSER (Chapter 2.5) /SERDATI=pin_name See function /PSER (Chapter 2.5) /LSB1ST See function /PSER (Chapter 2.5) Example: JTAuxxxx /VSER EEPROM.CFG /SERCLK=GPIO0 /SERDAT=GPIO1 ...
Page 81
... Specify this option, if there is a SPI device connected instead of a I²C device. /MWIRE Specify this option, if there is a MicroWire device connected instead of an I²C device. /DEVICE-BASE=hhhhhh See function /PSER (Chapter 2.5) 4 /OFFSET=hhhhhh The memory dump starts at an offset of hhhhhh. Default: /OFFSET=0 Abbreviation: /O= /LENGTH=hhhhhh Default: /LENGTH=100 ...
Page 82
AMD Alchemy Solutions Processors /SERDAT=pin_name See function /PSER (Chapter 2.5) /SERDATO=pin_name See function /PSER (Chapter 2.5) /SERDATI=pin_name See function /PSER (Chapter 2.5) /LSB1ST See function /PSER (Chapter 2.5) Example: JTAuxxxx /DUMPSER /SERCLK=GPIO0 /SERDAT=GPIO1 This example makes a memory dump of ...
Page 83
Toggle CPU pins Usage: JTAuxxxx /BLINK /PIN=pinname [optionlist] This command allows to test the hardware by blinking with LEDs or toggling CPU signals. Faster signals can be generated by setting the delay option to zero. This can be a ...
Page 84
AMD Alchemy Solutions Processors 2.10. Polling CPU pins Usage: JTAuxxxx /PIN? /PIN=pinname [optionlist] This command allows to test the hardware by polling CPU signals. Please Note: Not every pin of the AMD Alchemy Solutions Processors may be specified as an ...
Page 85
Polling CPU pins while the CPU is running Usage: JTAuxxxx /SAMPLE /PIN=pinname [optionlist] This command is similar to the function /PIN?. But with this function any pin can be observed, independent of the pin direction. Furthermore the CPU remains ...
Page 86
AMD Alchemy Solutions Processors 2.12. Show status of all CPU pins while the CPU is running Usage: JTAuxxxx /SNAP [optionlist] This function is similar to the function /SAMPLE, but displays the status of all CPU pins on the screen. The ...
Page 87
Sample output: This is a sample output for a AMD Alchemy Solutions Au1100 Processor | 0 GPIO10 | 0 USBH1P | 0 S0DIN | 0 USBDP | 0 GPIO12 | 0 S0DOUT | 0 U1RXD | 0 IRDARX | 0 ...
Page 88
AMD Alchemy Solutions Processors | 1 PIOR PIOS16 PREG PWAIT LRD0 LRD1 EWAIT LCLK | 1 RD1 | 0 RD2 | 1 RD5 | 1 RD6 ...
Page 89
Implementation Information This chapter summarizes some information about the implementation of the JTAG-Booster and describes some restrictions. • The JTAG-Booster currently uses Boundary Scan to perform Flash programming. EJTAG is not used. • The software assumes the following scheme ...
Page 90
AMD Alchemy Solutions Processors 4. Converter Program HEX2BIN.EXE Since the JTAG-Booster software is not able to handle Intel-HEX or Motorola S- Record files, an separate converter tool is delivered with this product package. Five types of HEX formats can be ...
Page 91
Please Note: "CODE segment start address" is interpreted as a Intel x86 architecture segment address: You have to specify a start address of 10000 to start the conversion at 1 MByte. This converter is a relatively old DOS tool and ...
Page 92
AMD Alchemy Solutions Processors 5. Support for Windows NT, Windows 2000 and Windows XP A configured run time version of the "Kithara DOS Enabler, Version 6.x" is used to give support for some of our DOS based tools (like the ...
Page 93
... De-Installation version 5.x/6.x: For deinstallation of the runtime version of the "Kithara DOS-Enabler Version 5.x/6.x": • use: Settings - Control-Panel - Add/Remove Programs and remove the “FS FORTH-SYSTEME WinNT Support” and/or “WinNT Support for JTAG-Booster and FLASH166” • Reboot your PC JTAG_alchemyb.doc AMD Alchemy Solutions Processors ...