CA3162E Intersil, CA3162E Datasheet - Page 4
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CA3162E
Manufacturer Part Number
CA3162E
Description
IC CONVERTER A/D 3-DIGIT 16-DIP
Manufacturer
Intersil
Datasheet
1.CA3162E.pdf
(7 pages)
Specifications of CA3162E
Rohs Status
RoHS non-compliant
Other names
CA3162
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CA3162E
Manufacturer:
INTERSIL
Quantity:
430
Company:
Part Number:
CA3162E
Manufacturer:
HARRIS
Quantity:
5 510
Part Number:
CA3162E
Manufacturer:
INTERSIL
Quantity:
20 000
Timing Diagram
Detailed Description
The Functional Block Diagram of the CA3162E shows the V/I
converter and reference current generator, which is the heart
of the system. The V/I converter converts the input voltage
applied between pins 10 and 11 to a current that charges the
integrating capacitor on pin 12 for a predetermined time inter-
val. At the end of the charging interval, the V/I converter is dis-
connected from the integrating capacitor, and a band gap
NOTES:
INPUTS
1. The capacitor used here must be a low dielectric absorption type
2. This capacitor should be placed as close as possible to the power
NORMAL
LOW SPEED MODE:
V6 = GROUND OR
HIGH SPEED MODE:
V
4 (MSD)
3 (NSD)
5 (LSD)
HOLD:
V
6
6
= 5V
such as a polyester or polystyrene type.
and ground Pins of the CA3161E.
= 1.2V
OPEN
12
HIGH
LOW
11
10
FIGURE 1. HIGH SPEED MODE
6
GAIN
ADJ
8
FIGURE 2. BASIC DIGITAL READOUT SYSTEM USING THE CA3162E AND THE CA3161E
0.27µF
CA3162E
9
13
10
kΩ
12
2ms/DIV.
NOTE 1
7
14
OUTPUTS
DRIVERS
16
15
5
3
4
1
2
0.1
µF
DIGIT
BCD
NOTE 2
6
2
1
7
CA3161E
+5V
16
8
200mV
500mV
500mV
500mV
3
CA3162
13
12
11
10
15
14
9
4
MSD
reference constant current source of opposite polarity is
connected. The number of clock counts that elapse before the
charge is restored to its original value is a direct measure of
the signal induced current. The restoration is sensed by the
comparator, which in turn latches the counter. The count is
then multiplexed to the BCD outputs.
The timing for the CA3162E is supplied by a 786Hz ring
oscillator, and the input at pin 6 determines the sampling rate.
A 5V input provides a high speed sampling rate (96Hz), and
grounding or floating pin 6 provides a low speed (4Hz) sam-
pling rate. When pin 6 is fixed at +1.2V (by placing a 12K
resistor between pin 6 and the +5V supply) a “hold” feature is
available. While the CA3162E is in the hold mode, sampling
continues at 4Hz but the display data are latched to the last
reading prior to the application of the 1.2V. Removal of the
1.2V restores continuous display changes. Note, however,
that the sampling rate remains at 4Hz.
Figure 1 shows the timing of sampling and digit select pulses
for the high speed mode. Note that the basic A/D conversion
process requires approximately 5ms in both modes.
The “EEE” or “---” displays indicate that the range of the system
has been exceeded in the positive or negative direction,
respectively. Negative voltages to -99mV are displayed with the
minus sign in the MSD. The BCD code is 1010 for a negative
overrange (---) and 1011 for a positive overrange (EEE).
CA3162E
e
3, 4, 5
f
PINS
d
g
a
DIGIT
DRIVER
1kΩ
c
b
R1
150Ω
NSD
1, 2, 15, 16
CA3162E
e
f
PINS
d
g
a
BCD SEGMENT
DRIVERS
75Ω
ANODE LED
c
b
DISPLAYS
COMMON
R2
150Ω
LSD
e
f
d
g
a
POWER
2N2907, 2N3906
OR EQUIV.
c
b
150Ω
R3