IS62WV12816 ISSI, IS62WV12816 Datasheet
IS62WV12816
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IS62WV12816 Summary of contents
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... Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS62WV12816ALL and IS62WV12816BLL are packaged in the JEDEC standard 48-pin mini BGA (6mm x 8mm) and 44-Pin TSOP (TYPE II). A0-A16 ...
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... IS62WV12816ALL, IS62WV12816BLL PIN CONFIGURATIONS 48-Pin mini BGA (6mm x 8mm) (Package Code CSI I I GND I I I/O NC A16 I I/O I/O A14 A15 I A12 WE I/O NC A13 A10 ...
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... ISSI I/O PIN I/O8-I/O15 V Current DD High-Z High High-Z High High-Z High High-Z High High-Z High High-Z I OUT CC High-Z D OUT D D OUT OUT D High High Unit +0 °C 1.0 W IS62WV12816BLL 2.5V - 3.6V 2.5V - 3.6V ® ...
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... IS62WV12816ALL, IS62WV12816BLL DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL V Input HIGH Voltage IH IL (1) V Input LOW Voltage I Input Leakage LI I Output Leakage LO Notes (min.) = –1.0V for pulse width less than 10 ns. IL CAPACITANCE (1) Symbol Parameter C Input Capacitance ...
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... Inputs) V CS1 = ULB Control V CS1 = V I CMOS Standby CS1 V Current (CMOS Inputs) CS2 0.2V ULB Control V V IS62WV12816BLL, POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions I V Dynamic Operating Supply Current I I Operating Supply Current I I TTL Standby Current ...
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... IS62WV12816ALL, IS62WV12816BLL AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load 1.65-2.2V R1( 3070 R2( 3150 V 0.9V REF V 1. TEST LOADS R1 VTM OUTPUT 30 pF Including jig and scope Figure 1 6 62WV12816ALL (Unit) 0. -0. ...
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... IS62WV12816ALL, IS62WV12816BLL READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time AA t Output Hold Time OHA CS1/CS2 Access Time t t ACS1/ ACS2 OE Access Time t DOE OE to High-Z Output t (2) HZOE OE to Low-Z Output t (2) LZOE CS1/CS2 to High-Z Output ...
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... IS62WV12816ALL, IS62WV12816BLL AC WAVEFORMS (Address Controlled) (CS1 = READ CYCLE NO. 1 (1,2) ADDRESS D OUT PREVIOUS DATA VALID AC WAVEFORMS (1,3) (CS1, CS2, OE, AND UB/LB Controlled) READ CYCLE NO. 2 ADDRESS OE CS1 CS2 DOUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE, CS1, UB Address is valid prior to or coincident with CS1 LOW transition. ...
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... IS62WV12816ALL, IS62WV12816BLL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time WC CS1/CS2 to Write End t t SCS1/ SCS2 t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA LB, UB Valid to End of Write t PWB WE Pulse Width t PWE t Data Setup to Write End ...
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... IS62WV12816ALL, IS62WV12816BLL AC WAVEFORMS (1,2) (CS1 Controlled HIGH or LOW) WRITE CYCLE NO. 1 ADDRESS CS1 CS2 WE LB, UB DOUT DIN Notes: 1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS1 , CS2 and WE inputs and at least one of the LB and UB inputs being in the LOW state. ...
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... IS62WV12816ALL, IS62WV12816BLL AC WAVEFORMS (WE Controlled HIGH During Write Cycle) WRITE CYCLE NO. 2 ADDRESS OE CS1 CS2 WE LB, UB DOUT DIN Integrated Silicon Solution, Inc. — www.issi.com — Rev. E 06/08/ SCS1 t SCS2 PWE HZWE HIGH-Z DATA UNDEFINED t SD 1-800-379-4774 ISSI t HA ...
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... IS62WV12816ALL, IS62WV12816BLL AC WAVEFORMS (WE Controlled LOW During Write Cycle) WRITE CYCLE NO. 3 ADDRESS OE CS1 CS2 WE LB, UB DOUT DIN SCS1 t SCS2 PWE HZWE HIGH-Z DATA UNDEFINED t SD Integrated Silicon Solution, Inc. — www.issi.com — ISSI LZWE t HD DATA-IN VALID ® ...
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... IS62WV12816ALL, IS62WV12816BLL AC WAVEFORMS WRITE CYCLE NO. 4 (UB/LB Controlled) ADDRESS OE LOW CS1 HIGH CS2 WE UB HZWE D OUT DATA UNDEFINED D IN Integrated Silicon Solution, Inc. — www.issi.com — Rev. E 06/08/ ADDRESS 1 ADDRESS PBW WORD 1 HIGH ...
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... IS62WV12816ALL, IS62WV12816BLL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter V V for Data Retention Data Retention Current DR t Data Retention Setup Time SDR t Recovery Time RDR DATA RETENTION WAVEFORM VDD V DR CS1 GND DATA RETENTION WAVEFORM VDD CS2 V DR GND 14 Test Condition See Data Retention Waveform = 1 ...
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... IS62WV12816ALL, IS62WV12816BLL ORDERING INFORMATION: IS62WV12816ALL (1.65V - 2.2V) Commercial Range: 0°C to +70°C Speed (ns) Order Part No. 70 IS62WV12816ALL-70T Industrial Range: –40°C to +85°C Speed (ns) Order Part No. 70 IS62WV12816ALL-70TI 70 IS62WV12816ALL-70BI 70 IS62WV12816ALL-70B2I ORDERING INFORMATION: IS62WV12816BLL (2.5V - 3.6V) Commercial Range: 0°C to +70°C Speed (ns) Order Part No. ...
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... Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — ...
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... Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — ...