ISL43L410 Intersil Corporation, ISL43L410 Datasheet
ISL43L410
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ISL43L410 Summary of contents
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... This part may be used to “mux-in” additional functionality while reducing ASIC design risk. The ISL43L410 is offered in small form factor packages, alleviating board space limitations. The ISL43L410 is a committed double-pole/double-throw (DPDT) that consists of two normally open (NO) and two normally closed (NC) switches ...
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... Pinout (Note 1) ISL43L410 (TDFN, MSOP) TOP VIEW NO1 2 COM1 3 ADD 4 NC1 5 LOGIC NOTE: 1. Switches Shown for Logic “0” Input. Ordering Information PART NUMBER PART MARKING ISL43L410IR L40 ISL43L410IR-T L40 ISL43L410IU L410 ISL43L410IU-T L410 ISL43L410IRZ L40Z (See Note) ISL43L410IRZ-T L40Z ...
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... Maximum Junction Temperature (Plastic Package 150°C Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s 300°C (Lead Tips Only) Operating Conditions Temperature Range ISL43L410IX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C Test Conditions +2.7V to +3.3V, GND = 0V, V Unless Otherwise Specified TEST CONDITIONS = 100mA ...
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... Input Voltage Low, V INL Input Voltage High, V INH Input Current 2.0V, V INH INL 4 ISL43L410 Test Conditions +2.7V to +3.3V, GND = 0V, V Unless Otherwise Specified (Continued) TEST CONDITIONS = (Note 8) IN Test Conditions +1.65V to +2V, GND = 0V, V Unless Otherwise Specified TEST CONDITIONS ...
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... ON LOGIC OFF INPUT Q = ∆ OUT L FIGURE 2A. MEASUREMENT POINTS V+ LOGIC INPUT 0V SWITCH OUTPUT V OUT 0V FIGURE 3A. MEASUREMENT POINTS 5 ISL43L410 t < 5ns r t < 5ns f V OUT 90% LOGIC INPUT Repeat test for all switches. C capacitance. FIGURE 1. SWITCHING TIMES Repeat test for all switches. ...
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... Signal direction through switch is reversed, worst case values are recorded. Repeat test for all switches. FIGURE 6. CROSSTALK TEST CIRCUIT Detailed Description The ISL43L410 is a bidirectional, double pole/double throw (DPDT) analog switch that offers precise switching capability from a single 1.65V to 3.6V supply with low on-resistance (0.25Ω) and high speed operation (t ...
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... OPTIONAL PROTECTION DIODE FIGURE 8. OVERVOLTAGE PROTECTION Power-Supply Considerations The ISL43L410 construction is typical of most single supply CMOS analog switches, in that they have two supply pins: V+ and GND. V+ and GND drive the internal CMOS switches and set their analog voltage limits. Unlike switches with a 4V maximum supply voltage, the ISL43L410 4 ...
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... V (V) COM FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE 25°C 85°C 20 -40° 1 (V) FIGURE 13. TURN - ON TIME vs SUPPLY VOLTAGE 8 ISL43L410 T = 25°C, Unless Otherwise Specified A 0. 100mA COM 0.3 0.28 0.26 0.24 0.22 0.2 0. 100 100mA COM 25°C -40°C -25 -50 1 ...
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... FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE - -20 -30 -40 -50 -60 ISOLATION -70 -80 CROSSTALK -90 -100 -110 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 17. CROSSTALK AND OFF ISOLATION 9 ISL43L410 T = 25°C, Unless Otherwise Specified (Continued GAIN -20 PHASE R V 3 Die Characteristics 20 SUBSTRATE POTENTIAL (POWERED UP): 30 GND 40 ...
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... INDEX AREA (DATUM N (Nd-1)Xe REF. BOTTOM VIEW C L (A1 SECTION "C-C" FOR ODD TERMINAL/SIDE 10 ISL43L410 L10.3x3A 0. LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE 2X 0. SYMBOL 0. 0. NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11 ISL43L410 M10.118 (JEDEC MO-187BA) 10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE SYMBOL ...