x40015 Intersil Corporation, x40015 Datasheet
x40015
Related parts for x40015
x40015 Summary of contents
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... SCL Logic Threshold Reset Logic V CC (V1MON) User Programmable V2MON User Programmable 1 X40010, X40011, X40014, X40015 March 28, 2005 APPLICATIONS • Communication Equipment —Routers, Hubs, Switches —Disk Arrays, Network Storage • Industrial Systems —Process Control —Intelligent Instrumentation • Computer Systems —Computers —Network Servers ...
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... LOW and followed by a stop condition) restarts the Watchdog timer. The absence of this transi- tion within the watchdog time out period results in WDO going active. 2 X40010, X40011, X40014, X40015 The Watchdog Timer provides an independent protec- tion mechanism for microcontrollers. When the micro- point ...
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... This voltage sense circuitry TRIP2 monitors the power supply connected to the V2MON pin V2MON can still be monitored X40010, X40011, X40014, X40015 Function For the X40014/15 devices, the V2FAIL signal remains actice until V until V2MON returns and exceeds V circuitry is powered monitored. ...
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... X40010/11/14/15trip points may be adjusted. The pro- cedure is described below, and uses the application of a high voltage control signal. 4 X40010, X40011, X40014, X40015 V /V2MON 00h ...
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... Adj. V TRIP2 Adj. 5 X40010, X40011, X40014, X40015 one data byte is allowed for each register write opera- tion. Prior to writing to the Control Register, the WEL and RWEL bits must be set using a two step process, with the whole sequence requiring 3 steps. See "Writing to the Control Registers" ...
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... While the WEL bit is LOW, writes to any address, including any control registers will be ignored (no acknowledge will be issued after the Data Byte). The WEL bit is set by writing a “1” to the WEL bit and zeros to the other bits of the control register. 6 X40010, X40011, X40014, X40015 V Programming TRIPX Desired No ...
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... Writing a second byte to the control register is not allowed. Doing so aborts the write operation and returns a NACK. 7 X40010, X40011, X40014, X40015 – A read operation occurring between any of the previous operations will not interrupt the register write operation. – The RWEL bit cannot be reset without writing to the ...
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... LV2F, Low V2MON Reset Fail Bit (Volatile) The LV2F bit will be set to “0” when V2MON falls below V . TRIP2 8 X40010, X40011, X40014, X40015 Data Stable Data Change SERIAL INTERFACE Interface Conventions The device supports a bidirectional bus oriented proto- col. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver ...
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... Master Data Output from Data Output from Receiver Start 9 X40010, X40011, X40014, X40015 Start detected. The master must then issue a stop condition to return the device to Standby mode and place the device into a known state. Serial Write Operations Byte Write For a write operation, the device requires the Slave Address Byte and a Word Address Byte ...
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... See Figure 12. 10 X40010, X40011, X40014, X40015 ately issues another start condition and the Slave Address Byte with the R/W bit set to one. This is followed by an acknowledge from the device and then by the eight bit word ...
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... See Figure 14 for the address, acknowledge, and data transfer sequence. 11 X40010, X40011, X40014, X40015 A similar operation called “Set Current Address” where the device will perform this operation if a stop is issued instead of the second start shown in Figure 13. The device will go into standby mode after the stop and all bus activity will be ignored until a start is detected ...
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... Signals from the Slave 12 X40010, X40011, X40014, X40015 – One bit of the slave command byte is a R/W bit. The R/W bit of the Slave Address Byte defines the oper- ation to be performed. When the R/W bit is a one, then a read operation is selected. A zero selects a write operation ...
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... A C Signals from K the Slave 13 X40010, X40011, X40014, X40015 Data Protection The following circuitry has been included to prevent inadvertent writes: – The WEL bit must be set to allow write operations. – The proper clock count and bit sequence is required prior to the stop bit in order to start a nonvolatile write cycle. – ...
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... V to V2FAIL RPD2 TRIP2 14 X40010, X40011, X40014, X40015 COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied ...
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... Based on characterization data. EQUIVALENT INPUT CIRCUIT FOR VxMON ( ∆V VxMON V ref CAPACITANCE Symbol (1) C Output Capacitance (SDA, RESET, RESET, V2FAIL, OUT WDO) (1) C Input Capacitance (SCL) IN Note: (1) This parameter is not 100% tested. 15 X40010, X40011, X40014, X40015 (Continued) (4) Min. Typ. 1.7 0.9 2.85 2.9 2.55 2.6 1.65 1.7 1.25 1.3 0.95 1 – ...
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... A.C. TEST CONDITIONS Input pulse levels V CC Input rise and fall times 10ns Input and output timing levels V CC Output load Standard output load 16 X40010, X40011, X40014, X40015 SYMBOL TABLE WAVEFORM V2MON 4.6KΩ V2FAIL 30pF 0.5 INPUTS OUTPUTS ...
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... SDA and SCL Fall Time F Cb Capacitive load for each bus line Note: ( total capacitance of one bus line in pF. TIMING DIAGRAMS Bus Timing t F SCL t SU:STA t HD:STA SDA IN SDA OUT 17 X40010, X40011, X40014, X40015 Parameter t t HIGH LOW t SU:DAT t HD:DAT 400kHz Min. Max. 0 400 50 0.1 0.9 1 ...
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... Acknowledge Polling is used. Power Fail Timings TRIPX [ ] V2MON [ ] LOWLINE or V2FAIL or V3FAIL X40010, X40011, X40014, X40015 ACK Stop Condition Parameter Min. t RPDL t RPDX t RPDL t RPDX V RVALID t WC Start ...
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... RST1 WD1=0, WD0=0 WD1=0, WD0=1 t Watchdog Reset Time Out Delay WD1=1, WD0=0 RST2 t Watchdog timer restart pulse width RSP Notes: ( 25°C. CC (2) Values based on characterization data only. 19 X40010, X40011, X40014, X40015 t RPD1 Parameters t PURST t F (1) Min. Typ. Max ...
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... SCL SDA WDO Minimum Sequence to Reset WDT SCL SDA V Set/Reset Conditions TRIPX (V TRIPX t TSU WDO t VPS SCL 0 SDA A0h Start 20 X40010, X40011, X40014, X40015 Start Clockin ( RSP < t WDO Start ) V /V2MON resets V 01h* 03h* sets V TRIP1 ...
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... Set Voltage Range – X40010/11 TRAN2 TRIP2 V V Set to Voltage Range – X40014/15 TRAN2A TRIP2 V V Set Voltage variation after programming (-40 to +85°C). tv TRIPX t WDO Program Voltage Setup time VPS 21 X40010, X40011, X40014, X40015 = 2.0-5.5V; Temperature = 25°C CC Description Min. Max. Unit 10 µs 10 µs 10 µs 10 µ ...
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... PACKAGING INFORMATION Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 22 X40010, X40011, X40014, X40015 8-Lead Plastic, SOIC, Package Code S8 Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.050 (1.27) X 45° 0.0075 (0.19) 0.250" 0.010 (0.25) FOOTPRINT ...
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... PACKAGING INFORMATION 0° - 8° See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 23 X40010, X40011, X40014, X40015 8-Lead Plastic, TSSOP, Package Code V8 .025 (.65) BSC .169 (4.3) .177 (4.5) .114 (2.9) .122 (3.1) .047 (1.20) .0075 (.19) .002 (.05) .006 (.15) .0118 (.30) .010 (.25) Gage Plane Seating Plane .019 (.50) ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 24 X40010, X40011, X40014, X40015 Operating Tem- Range Package ...