PIC16HV540-04/P Microchip Technology, PIC16HV540-04/P Datasheet - Page 41

IC MCU OTP 512X12 18DIP

PIC16HV540-04/P

Manufacturer Part Number
PIC16HV540-04/P
Description
IC MCU OTP 512X12 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16HV540-04/P

Core Size
8-Bit
Program Memory Size
768B (512 x 12)
Core Processor
PIC
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Type
OTP
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 15 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16HV
No. Of I/o's
12
Ram Memory Size
25Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
DIP
Processor Series
PIC16H
Core
PIC
Data Bus Width
8 bit
Data Ram Size
25 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
12
Number Of Timers
8
Operating Supply Voltage
3.5 V to 15 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164001 - MODULE SKT PROMATEII 18/28DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16HV540-04/P
Manufacturer:
Microchip
Quantity:
1 736
7.9
The TO, PD and PCWUF bits in the STATUS register
can be tested to determine if a RESET condition has
been caused by a power-up condition, a MCLR, Watch-
dog Timer (WDT) Reset, WDT Wake-up Reset, or
Wake-up from SLEEP on Pin Change.
TABLE 7-7:
These STATUS bits are only affected by events listed in
Table 7-8.
TABLE 7-8:
Table 7-3 lists the reset conditions for the special func-
tion registers, while Table 7-4 lists the reset conditions
for all the registers.
Legend:
Note 1:
Power-up
WDT Time-out
SLEEP instruction
CLRWDT instruction
Wake-up from SLEEP
on Pin Change
Legend:
PCWUF
Note: A WDT time-out will occur regardless of the status of the TO
2000 Microchip Technology Inc.
1
u
u
u
u
0
x
bit. A SLEEP instruction will be executed, regardless of the
status of the PD bit. Table 7-7 reflects the status of TO and PD
after the corresponding event.
Event
Time-out Sequence and Power-down
Status Bits (TO/PD/PCWUF)
u = unchanged, x = unknown
The TO and PD and PCWUF bits maintain their status (u)
until a reset occurs. A low-pulse on the MCLR input does
not change the TO and PD and PCWUF status bits.
u = unchanged
TO
1
u
1
0
0
u
x
PD
TO/PD/PCWUF STATUS
AFTER RESET
EVENTS AFFECTING TO/PD
STATUS BITS
1
u
0
1
0
u
x
PCWUF
Power-up (POR)
MCLR Reset (normal operation)
MCLR Wake-up Reset (from SLEEP)
WDT Reset (normal operation)
WDT Wake-up Reset (from SLEEP)
Wake-up from SLEEP on Pin Change
Brown-out Reset
1
u
1
u
0
RESET was caused by
TO
1
0
1
1
u
PD
1
u
0
1
u
No effect on
PD
Remarks
(1)
Preliminary
7.10
A device may be powered down (SLEEP) and later
powered up (Wake-up from SLEEP).
7.10.1
The Power-down mode is entered by executing a
SLEEP instruction.
If enabled, the Watchdog Timer will be cleared but
keeps running, the TO bit (STATUS<4>) is set, the PD
bit
(STATUS<7>) is set and the oscillator driver is turned
off. The I/O ports maintain the status they had before
the SLEEP instruction was executed (driving high, driv-
ing low, or hi-impedance).
It should be noted that a RESET generated by a WDT
time-out does not drive the MCLR/V
For lowest current consumption while powered down,
the T0CKI input should be at V
V
7.10.2
The device can wake up from SLEEP through one of
the following events:
1.
2.
3.
4.
These events cause a device RESET. The TO and PD
and PCWUF bits can be used to determine the cause
of device RESET. The TO bit is cleared if a WDT time-
out occurred (and caused wake-up). The PD bit, which
is set on power-up, is cleared when SLEEP is invoked.
The PCWUF bit indicates a change in state while in
SLEEP at pins PORTB:<0-3,7> (since the SLEEP state
was entered).
The WDT is cleared when the device wakes from
SLEEP, regardless of the wake-up source.
PP
pin must be at a logic high level (V
An external reset input on MCLR/V
A Watchdog Timer Time-out Reset (if WDT was
enabled).
A change on input pins PORTB:<0-3,7> when
Wake-up on Pin Change is enabled.
Brown-out Reset.
(STATUS<3>)
Power-down Mode (SLEEP)
SLEEP
WAKE-UP FROM SLEEP
is
PIC16HV540
cleared,
DD
or V
the
PP
DS40197B-page 41
SS
IH
pin low.
and the MCLR/
PP
MCLR).
PCWUF
pin.
bit

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