PIC12C672-04/SM Microchip Technology, PIC12C672-04/SM Datasheet - Page 683

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PIC12C672-04/SM

Manufacturer Part Number
PIC12C672-04/SM
Description
IC MCU OTP 2KX14 A/D 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets

Specifications of PIC12C672-04/SM

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Glossary
S
Sampling Time
Sampling time is the complete time to get an A/D result. It includes the acquisition time and the
conversion time.
Serial Peripheral Interface (SPI)
This is one of the modes of the SSP module. This is typically a 3-wire interface, with a data out
line, a data in line, and a clock line. Since the clock is present, this is a synchronous interface.
SFR
Special Function Register. These registers contain the control bits and status information for the
device.
Single cycle instruction
An instruction that executes in a “single” machine cycle (T
).
CY
Sleep
This is the low power mode of the device, where the device’s oscillator is disabled.This reduces
the current the device consumes. Certain peripherals may be placed into modes where they con-
tinue to operate.
Special Function Registers (SFR)
These registers contain the control bits and status information for the device.
SPI
See Serial Peripheral Interface.
Stack
A portion of the CPU which retains the return address for program execution. The stack gets
loaded with the value in the Program Counter when a
CALL
instruction is executed or an interrupt
occurs.
35
1997 Microchip Technology Inc.
DS31035A-page 35-11

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