PIC12C671-10/P Microchip Technology, PIC12C671-10/P Datasheet - Page 272

• Manufacturer Part Number: PIC12C671-10/P
• Description: IC MCU OTP 1KX14 A/D 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C671-10/P

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 1
• Digital Ic Case Style: DIP
• Package: 8PDIP
• Device Core: PIC
• Family Name: PIC12
• Maximum Speed: 10 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 5
• On-chip Adc: 4-chx8-bit
• Number Of Timers: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PICmicro MID-RANGE MCU FAMILY
16.4.4
16.4.5
DS31016A-page 16-22
INTCON
PIR
PIE
SSPBUF
SSPADD
SSPCON WCOL SSPOV SSPEN
SSPSTAT
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'.
Note 1: The position of these bits is device dependent.
Name
2: These bits can also be named GPIE and GPIF.
Shaded cells are not used by SSP in I
Sleep Operation
Effect of a Reset
Synchronous Serial Port Receive Buffer/Transmit Register
Synchronous Serial Port (I
Bit 7
GIE
—
PEIE
While in sleep mode, the I
or complete byte transfer occurs wake the processor from sleep (if the SSP interrupt is enabled).
A reset disables the SSP module and terminates the current transfer.
Table 16-3: Registers Associated with I
Bit 6
—
Bit 5
T0IE
D/A
2
C mode) Address Register
INTE RBIE
Bit 4
CKP
P
SSPIE
SSPIF
2
2
C mode.
SSPM3 SSPM2 SSPM1 SSPM0
C module can receive addresses or data, and when an address match
Bit 3
S
(1)
(1)
(2)
Bit 2
T0IF
R/W
2
C Operation
INTF
Bit 1
UA
RBIF
Bit 0
BF
(2)
0000 000x
xxxx xxxx
0000 0000
0000 0000
--00 0000
Value on:
1997 Microchip Technology Inc.
POR,
BOR
0
0
other resets
Value on all
0000 000u
uuuu uuuu
0000 0000
0000 0000
--00 0000
0
0