PIC16F913-I/SS Microchip Technology, PIC16F913-I/SS Datasheet - Page 140

• Manufacturer Part Number: PIC16F913-I/SS
• Description: IC PIC MCU FLASH 4KX14 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F913-I/SS

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC16F
• No. Of I/o's: 24
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Package: 28SSOP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 24
• Interface Type: I2C/SPI/USART
• On-chip Adc: 5-chx10-bit
• Number Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Ram Size: 352 B
• Maximum Clock Frequency: 20 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164307 - MODULE SKT FOR PM3 28SSOPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Lead Free Status / Rohs Status: Details

PIC16F913/914/916/917/946
FIGURE 9-8:
TABLE 9-7:
DS41250F-page 138
INTCON
LCDCON
LCDSE1
PIE1
PIR1
RCREG
RCSTA
SSPCON
TRISC
TXSTA
Legend:
(SCKP = 0)
(SCKP = 1)
(Interrupt)
Note:
Name
TX/CK pin
TX/CK pin
CREN bit
bit SREN
SREN bit
RCIF bit
RXREG
RX/DT
Write to
Read
pin
x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for Synchronous Master Reception.
AUSART Receive Data Register
‘0’
Timing diagram demonstrates Sync Master mode with bit SREN = 1 and bit BRGH = 0.
TRISC7
LCDEN
WCOL
CSRC
SPEN
SE15
Bit 7
EEIE
EEIF
GIE
REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
TRISC6
SYNCHRONOUS RECEPTION (MASTER MODE, SREN)
SSPOV
SLPEN
SE14
ADIE
Bit 6
PEIE
ADIF
RX9
TX9
bit 0
TRISC5
SSPEN
WERR
SREN
TXEN
SE13
RCIE
RCIF
Bit 5
T0IE
bit 1
VLCDEN
TRISC4
CREN
SYNC
SE12
INTE
Bit 4
TXIE
TXIF
CKP
bit 2
ADDEN
TRISC3
SSPM3
SSPIE
SSPIF
RBIE
SE11
Bit 3
CS1
—
bit 3
CCP1IE
CCP1IF
TRISC2
SSPM2
BRGH
FERR
SE10
Bit 2
T0IF
CS0
bit 4
TMR2IE
TMR2IF
TRISC1
LMUX1
SSPM1
OERR
TRMT
Bit 1
INTF
SE9
bit 5
TMR1IE
TMR1IF
TRISC0
SSPM0
LMUX0
RX9D
TX9D
Bit 0
RBIF
SE8
© 2007 Microchip Technology Inc.
bit 6
0000 000x
0001 0011
0000 0000
0000 0000
0000 0000
0000 0000
0000 000X
0000 0000
1111 1111
0000 -010
POR, BOR
Value on
bit 7
0000 000x
0001 0011
0000 0000
0000 0000
0000 0000
0000 0000
0000 000X
0000 0000
1111 1111
0000 -010
Value on
all other
Resets
‘0’