PIC16F913-I/SS Microchip Technology, PIC16F913-I/SS Datasheet - Page 220

• Manufacturer Part Number: PIC16F913-I/SS
• Description: IC PIC MCU FLASH 4KX14 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F913-I/SS

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC16F
• No. Of I/o's: 24
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Package: 28SSOP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 24
• Interface Type: I2C/SPI/USART
• On-chip Adc: 5-chx10-bit
• Number Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Ram Size: 352 B
• Maximum Clock Frequency: 20 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164307 - MODULE SKT FOR PM3 28SSOPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Lead Free Status / Rohs Status: Details

PIC16F913/914/916/917/946
15.3.4
In Sleep mode, the TMR2 register will not increment
and the state of the module will not change. If the CCPx
pin is driving a value, it will continue to drive that value.
When the device wakes up, TMR2 will continue from its
previous state.
15.3.5
The PWM frequency is derived from the system clock
frequency. Any changes in the system clock frequency
will result in changes to the PWM frequency. See
Section 4.0 “Oscillator Module (With Fail-Safe
Clock Monitor)” for additional details.
15.3.6
Any Reset will force all ports to Input mode and the
CCP registers to their Reset states.
TABLE 15-5:
DS41250F-page 218
CCPxCON
CCPRxL
CCPRxH
CMCON1
INTCON
LCDCON
LCDSE1
PIE1
PIE2
PIR1
PIR2
RCSTA
SSPCON
T1CON
T2CON
TMR1L
TMR1H
TMR2
TRISC
TRISD
Legend: - = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Capture, Compare
Note 1:
Name
(1)
and PWM.
PIC16F914/917 and PIC16F946 only.
OPERATION IN SLEEP MODE
CHANGES IN SYSTEM CLOCK
FREQUENCY
EFFECTS OF RESET
Capture/Compare/PWM Register X Low Byte
Capture/Compare/PWM Register X High Byte
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
T1GINV
TRISC7
TRISD7
LCDEN
OSFIE
OSFIF
WCOL
SPEN
SE15
EEIE
Bit 7
EEIF
GIE
—
—
—
SUMMARY OF REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND PWM
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
TRISC6
TRISD6
SSPOV
SLPEN
SE14
ADIE
Bit 6
PEIE
C2IE
ADIF
C2IF
RX9
—
—
TRISC5
TRISD5
SSPEN
CCPxX
WERR
SREN
SE13
RCIE
RCIF
Bit 5
T0IE
C1IE
C1IF
—
VLCDEN
TRISC4
TRISD4
CCPxY
LCDIE
LCDIF
CREN
SE12
INTE
TXIE
Bit 4
TXIF
CKP
—
CCPxM3
TRISC3
TRISD3
ADDEN
SSPM3
SSPIE
SSPIF
RBIE
SE11
Bit 3
CS1
—
—
—
15.3.7
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
5.
6.
CCPxM2
CCP1IE
CCP1IF
TRISC2
TRISD2
SSPM2
LVDIE
LVDIF
FERR
SE10
Bit 2
T0IF
CS0
Disable the PWM pin (CCPx) output drivers by
setting the associated TRIS bit.
Set the PWM period by loading the PR2 register.
Configure the CCP module for the PWM mode
by loading the CCPxCON register with the
appropriate values.
Set the PWM duty cycle by loading the CCPRxL
register and CCPx bits of the CCPxCON register.
Configure and start Timer2:
Enable PWM output after a new PWM cycle has
started:
—
• Clear the TMR2IF interrupt flag bit of the
• Set the Timer2 prescale value by loading the
• Enable Timer2 by setting the TMR2ON bit of
• Wait until Timer2 overflows (TMR2IF bit of
• Enable the CCPx pin output driver by
PIR1 register.
T2CKPS bits of the T2CON register.
the T2CON register.
the PIR1 register is set).
clearing the associated TRIS bit.
TMR1CS TMR1ON 0000 0000 uuuu uuuu
CCPxM1
SETUP FOR PWM OPERATION
TMR2IE
TMR2IF
TRISC1
TRISD1
T1GSS
LMUX1
SSPM1
OERR
Bit 1
INTF
SE9
—
—
CCPxM0 --00 0000 --00 0000
C2SYNC ---- --10 ---- --10
TMR1IE
CCP2IE
TMR1IF
CCP2IF
TRISC0
TRISD0
LMUX0
SSPM0
RX9D
RBIF
Bit 0
SE8
© 2007 Microchip Technology Inc.
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 000x 0000 000x
0001 0011 0001 0011
0000 0000 0000 0000
0000 0000 0000 0000
0000 -0-0 0000 -0-0
0000 0000 0000 0000
0000 -0-0 0000 -0-0
0000 000x 0000 000x
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1111
POR, BOR
Value on
Value on
all other
Resets