ATMEGA8515L-8AU Atmel, ATMEGA8515L-8AU Datasheet - Page 49

IC AVR MCU 8K 8MHZ 3V 44TQFP

ATMEGA8515L-8AU

Manufacturer Part Number
ATMEGA8515L-8AU
Description
IC AVR MCU 8K 8MHZ 3V 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8515L-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
35
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Watchdog Reset
MCU Control and Status
Register – MCUCSR
2512K–AVR–01/10
When the Watchdog times out, it will generate a short reset pulse of one CK cycle dura-
tion. On the falling edge of this pulse, the delay timer starts counting the Time-out period
t
Figure 27. Watchdog Reset During Operation
The MCU Control and Status Register provides information on which reset source
caused an MCU Reset.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by
writing a logic zero to the flag.
• Bit 0 – PORF: Power-on Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to
the flag.
To make use of the Reset Flags to identify a reset condition, the user should read and
then reset the MCUCSR as early as possible in the program. If the register is cleared
before another reset occurs, the source of the reset can be found by examining the
Reset Flags.
TOUT
Bit
Read/Write
Initial Value
. Refer to page 53 for details on operation of the Watchdog Timer.
CC
R/W
7
0
R/W
6
0
SM2
R
5
0
CK
R/W
4
WDRF
R/W
3
See Bit Description
BORF
R/W
2
ATmega8515(L)
EXTRF
R/W
1
PORF
R/W
0
MCUCSR
49

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