PIC24HJ12GP202-I/SS Microchip Technology, PIC24HJ12GP202-I/SS Datasheet - Page 16

• Manufacturer Part Number: PIC24HJ12GP202-I/SS
• Description: IC PIC MCU FLASH 4KX24 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ12GP202-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 12KB (4K x 24)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit or 10-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.7
If the PLL of the target device is enabled and
configured for the device start-up oscillator, the
maximum oscillator source frequency must be limited
to 4 MHz < F
oscillator frequency is outside this range, the
application must start-up in FRC mode first. The default
PLL settings after a POR with an oscillator frequency
outside this range will violate the device operating
speed.
When the device powers up, the application firmware
can initialize the PLL SFRs, CLKDIV and PLLDBF to a
suitable value, and then perform a clock switch to the
Oscillator + PLL clock source. Note that clock switching
must be enabled in the device Configuration word.
2.8
If MPLAB ICD 2, MPLAB ICD 3, or MPLAB REAL ICE
in-circuit emulator is selected as a debugger, it
automatically initializes all of the A/D input pins (ANx)
as “digital” pins, by setting all bits in the AD1PCFGL
register.
The bits in the register that correspond to the A/D pins
that are initialized by MPLAB ICD 2, MPLAB ICD 3, or
MPLAB REAL ICE in-circuit emulator, must not be
cleared by the user application firmware; otherwise,
communication errors will result between the debugger
and the device.
If your application needs to use certain A/D pins as
analog input pins during the debug session, the user
application must clear the corresponding bits in the
AD1PCFGL register during initialization of the ADC
module.
When MPLAB ICD 2, MPLAB ICD 3, or MPLAB REAL
ICE in-circuit emulator is used as a programmer, the
user application firmware must correctly configure the
AD1PCFGL register. Automatic initialization of this
register is only done during debugger operation.
Failure to correctly configure the register(s) will result in
all A/D pins being recognized as analog input pins,
resulting in the port value being read as a logic ‘0’,
which may affect user application functionality.
DS70282D-page 14
Oscillator Value Conditions on
Device Start-up
Configuration of Analog and
Digital Pins During ICSP
Operations
IN
< 8 MHz. This means that if the external
Preliminary
2.9
Unused I/O pins should be configured as outputs and
driven to a logic low state.
Alternately, connect a 1k to 10k resistor to V
unused pins and drive the output to logic low.
Unused I/Os
© 2009 Microchip Technology Inc.
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