PIC24HJ12GP202-I/SS Microchip Technology, PIC24HJ12GP202-I/SS Datasheet - Page 170

• Manufacturer Part Number: PIC24HJ12GP202-I/SS
• Description: IC PIC MCU FLASH 4KX24 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ12GP202-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 12KB (4K x 24)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit or 10-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24HJ12GP201/202
19.5
PIC24HJ12GP201/202 devices implement a JTAG
interface, which supports boundary scan device test-
ing, as well as in-circuit programming. Detailed infor-
mation on this interface will be provided in future
revisions of the document.
19.6
The
intermediate implementation of CodeGuard Security.
CodeGuard Security enables multiple parties to
securely share resources (memory, interrupts and
peripherals) on a single chip. This feature helps protect
individual intellectual property in collaborative system
designs.
When coupled with software encryption libraries, Code-
Guard Security can be used to securely update Flash
even when multiple IPs reside on the single chip.
The code protection features are controlled by the
Configuration registers: FBS and FGS. The Secure
Segment and RAM is not implemented.
DS70282D-page 168
PIC24HJ12GP201/202
JTAG Interface
Code Protection and
CodeGuard™ Security
devices
offer
Preliminary
the
TABLE 19-3:
BSS<2:0> = x11
BSS<2:0> = x10
BSS<2:0> = x01
BSS<2:0> = x00
Note:
CONFIG BITS
1792
256
768
0K
Refer to Section 23. “CodeGuard™
Security” (DS70239) of the “PIC24H
Family Reference Manual” for further
information on usage, configuration and
operation of CodeGuard Security.
CODE FLASH SECURITY
SEGMENT SIZES FOR 12 Kb
DEVICES
© 2009 Microchip Technology Inc.
GS = 3840 IW
GS = 3584 IW
GS = 3072 IW
BS = 1792 IW
GS = 2048 IW
VS = 256 IW
VS = 256 IW
BS = 256 IW
VS = 256 IW
BS = 768 IW
VS = 256 IW
000000h
000200h
000400h
000800h
001000h
000000h
000200h
000400h
000800h
001000h
000800h
000FFEh
001FFEh
000800h
000FFEh
001000h
001FFEh
0001FEh
0003FEh
0007FEh
000FFEh
001FFEh
0001FEh
0003FEh
0007FEh
000FFEh
001FFEh
000000h
0001FEh
000200h
0003FEh
000400h
0007FEh
001000h
000000h
0001FEh
000200h
0003FEh
000400h
0007FEh