PIC24FJ48GA002-I/SS Microchip Technology, PIC24FJ48GA002-I/SS Datasheet - Page 17

IC PIC MCU FLASH 48K 28-SSOP

PIC24FJ48GA002-I/SS

Manufacturer Part Number
PIC24FJ48GA002-I/SS
Description
IC PIC MCU FLASH 48K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ48GA002-I/SS

Core Size
16-Bit
Program Memory Size
48KB (16K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164338 - MOD SKT PIC24F/DSPIC33F 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ48GA002-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS39881D):
1. Module: Guidelines for Getting Started
Section 2.4 Voltage Regulator Pins (ENVREG/
DISVREG and V
a new and more detailed section. The entire text follows:
2.4
The on-chip voltage regulator enable/disable pin
(ENVREG or DISVREG, depending on the device
family) must always be connected directly to either a
supply voltage or to ground. The particular connection
is determined by whether or not the regulator is to be
used:
• For ENVREG, tie to V
• For DISVREG, tie to ground to enable the
Refer to Section 24.2 “On-Chip Voltage Regulator”
for details on connecting and using the on-chip
regulator.
TABLE 2-1
 2010 Microchip Technology Inc.
Note:
Note:
or to ground to disable the regulator
regulator or to V
Panasonic
Panasonic
Murata
Murata
Make
TDK
TDK
Voltage Regulator Pins (ENVREG/
DISVREG and V
Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
This section applies only to PIC24FJ
devices with an on-chip voltage regulator.
with 16-Bit Microcontrollers
CAP
SUITABLE CAPACITOR EQUIVALENTS
GRM32DR71C106KA01L
GRM31CR61C106KC31L
DD
/V
to disable the regulator
C3216X7R1C106K
C3216X5R1C106K
DDCORE
ECJ-3YX1C106K
ECJ-4YB1C106K
DD
to enable the regulator,
Part #
CAP
) has been replaced with
/V
DDCORE
)
Capacitance
PIC24FJ64GA004 FAMILY
Nominal
10 µF
10 µF
10 µF
10 µF
10 µF
10 µF
When the regulator is enabled, a low-ESR (< 5Ω)
capacitor is required on the V
stabilize the voltage regulator output voltage. The V
V
use a capacitor of 10 µF connected to ground. The type
can be ceramic or tantalum. Suitable examples of
capacitors are shown in
equivalent specifications can be used.
Designers may use
equivalence of candidate devices.
The placement of this capacitor should be close to
V
length not exceed 0.25 inch (6 mm). Refer to
Section 27.0
additional information.
When the regulator is disabled, the V
must be tied to a voltage supply at the V
Refer to Section 27.0 “Electrical Characteristics” for
information on V
FIGURE 2-3
.
DDCORE
CAP
Base Tolerance Rated Voltage Temp. Range
0.001
Note:
0.01
0.1
/V
10
1
DDCORE
0.01
±10%
±10%
±10%
±10%
±10%
±10%
pin must not be connected to V
Typical data measurement at 25°C, 0V DC bias.
. It is recommended that the trace
0.1
DD
“Electrical
and V
Frequency (MHz)
FREQUENCY vs. ESR
PERFORMANCE FOR
SUGGESTED V
1
Figure 2-3
DDCORE
16V
16V
16V
16V
16V
16V
Table
10
Characteristics”
CAP
2-1. Capacitors with
.
to evaluate ESR
100
DS80470E-page 17
/V
CAP
DDCORE
-55 to 125ºC
-55 to 125ºC
-55 to 125ºC
-55 to 85ºC
-55 to 85ºC
-55 to 85ºC
DDCORE
/V
CAP
DD
1000 10,000
DDCORE
and must
pin to
level.
CAP
pin
for
/

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