PIC18F26J50-I/SS Microchip Technology, PIC18F26J50-I/SS Datasheet
PIC18F26J50-I/SS
Specifications of PIC18F26J50-I/SS
Related parts for PIC18F26J50-I/SS
PIC18F26J50-I/SS Summary of contents
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... MPLAB IDE and Microchip’s programmers, debuggers, and emulation tools, which are available at the Microchip corporate web site (www.microchip.com). TABLE 1: SILICON DEVREV VALUES Part Number PIC18F24J50 PIC18F25J50 PIC18F26J50 PIC18F44J50 PIC18F45J50 PIC18F46J50 PIC18LF24J50 PIC18LF25J50 PIC18LF26J50 PIC18LF44J50 PIC18LF45J50 PIC18LF46J50 Note 1: The Device IDs (DEVID and DEVREV) are located at the last two implemented addresses of configuration memory space. They are shown in hexadecimal in the format “ ...
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... Wake-up events that occur during Deep Sleep entry may not generate an event. 7. Minimum operating voltage (V “F” devices is 2.25V high V voltages, performing an A/D DD conversion on Channel 15 could have issues. 9. Low voltages turn off constant current source. Affected (1) Revisions delay needed parameter for 2010 Microchip Technology Inc. ...
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... C modes, the TRISB<5:4> bits should be set. Affected Silicon Revisions 2010 Microchip Technology Inc. PIC18F46J50 FAMILY 2. Module: Master Synchronous Serial Port (MSSP) In extremely rare cases, when configured for I slave reception, the MSSP module may not receive the correct data. This occurs only if the Serial ...
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... RCSTA1, SPEN ;or RCSTA2 if EUSART2 nop ;1 Tcy delay nop ;1 Tcy delay (two total) ;CPU may now execute 2 cycle instructions Affected Silicon Revisions DS80436C-page 4 Work around Add delay after any instruction that re- CY enables the EUSART module (sets SPEN = 1). Refer to Example 1. 2010 Microchip Technology Inc. ...
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... F OSC 001 Affected Silicon Revisions 2010 Microchip Technology Inc. PIC18F46J50 FAMILY 5. Module: Parallel Master Port (PMP) When (PMMODEH<1:0> and PMPEN = 1), the data bus (PMD<7:0>) may not work correctly and incorrect data could be captured into the PMDIN1L register. Work around None ...
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... SLEEP instruction or the device will enter conventional Sleep mode, not Deep Sleep. Even on A4 silicon devices, if the firmware imme- diately executes SLEEP after setting DSEN, the device will enter Deep Sleep mode without benefitting from this work around. 2010 Microchip Technology Inc. ...
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... Affected Silicon Revisions 2010 Microchip Technology Inc. PIC18F46J50 FAMILY 9. Module: Charge Time Measurement Unit ) parameter On an “F” device, the CTMU current source will stop DD sourcing current if the applied V below the LVDSTAT (WDTCON<6>) threshold (2 ...
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... The input leakage specification for all other I/O pins remains unchanged at the +/-0.2 A maxi- mum level, as indicated by electrical parameters D060, D061 and D063 (I Characteristics”. = 2.15V Section 29.3 “DC IL 2010 Microchip Technology Inc. ...
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... Removed silicon issue 1 (Special Features, T1DIG) and modified decremented issue 2 (MSSP1) and 6 (Low-Power Modes – Deep Sleep). Added data sheet clarifications 1 (Special Features – CONFIG2L), 2 (DC Characteristics – Power-Down Current) and 3 (DC Characteristics – Input Leakage). 2010 Microchip Technology Inc. PIC18F46J50 FAMILY 5 (ADC), 1, formerly DS80436C-page 9 ...
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... PIC18F46J50 FAMILY NOTES: DS80436C-page 10 2010 Microchip Technology Inc. ...
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... REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 2010 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...