PIC16F872-I/SO Microchip Technology, PIC16F872-I/SO Datasheet - Page 272

• Manufacturer Part Number: PIC16F872-I/SO
• Description: IC MCU FLASH 2KX14 EE 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F872-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C/SPI/SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PICmicro MID-RANGE MCU FAMILY
16.4.4
16.4.5
DS31016A-page 16-22
INTCON
PIR
PIE
SSPBUF
SSPADD
SSPCON WCOL SSPOV SSPEN
SSPSTAT
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'.
Note 1: The position of these bits is device dependent.
Name
2: These bits can also be named GPIE and GPIF.
Shaded cells are not used by SSP in I
Sleep Operation
Effect of a Reset
Synchronous Serial Port Receive Buffer/Transmit Register
Synchronous Serial Port (I
Bit 7
GIE
—
PEIE
While in sleep mode, the I
or complete byte transfer occurs wake the processor from sleep (if the SSP interrupt is enabled).
A reset disables the SSP module and terminates the current transfer.
Table 16-3: Registers Associated with I
Bit 6
—
Bit 5
T0IE
D/A
2
C mode) Address Register
INTE RBIE
Bit 4
CKP
P
SSPIE
SSPIF
2
2
C mode.
SSPM3 SSPM2 SSPM1 SSPM0
C module can receive addresses or data, and when an address match
Bit 3
S
(1)
(1)
(2)
Bit 2
T0IF
R/W
2
C Operation
INTF
Bit 1
UA
RBIF
Bit 0
BF
(2)
0000 000x
xxxx xxxx
0000 0000
0000 0000
--00 0000
Value on:
1997 Microchip Technology Inc.
POR,
BOR
0
0
other resets
Value on all
0000 000u
uuuu uuuu
0000 0000
0000 0000
--00 0000
0
0