PIC24FJ64GA102-I/SO Microchip Technology, PIC24FJ64GA102-I/SO Datasheet - Page 122

• Manufacturer Part Number: PIC24FJ64GA102-I/SO
• Description: IC MCU 16BIT 64KB FLASH 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GA102-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001, MA240020, DM240002, DM240011, DV164033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Controller Family/series: PIC24
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Embedded Interface Type: I2C, LIN, SPI, USART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ64GA104 FAMILY
10.1.1
In addition to the PORT, LAT and TRIS registers for
data control, each port pin can also be individually
configured for either digital or open-drain output. This is
controlled by the Open-Drain Control register, ODCx,
associated with each port. Setting any of the bits con-
figures the corresponding pin to act as an open-drain
output.
The open-drain feature allows the generation of
outputs higher than V
digital only pins by using external pull-up resistors. The
maximum open-drain voltage allowed is the same as
the maximum V
10.2
The AD1PCFGL and TRIS registers control the opera-
tion of the A/D port pins. Setting a port pin as an analog
input also requires that the corresponding TRIS bit be
set. If the TRIS bit is cleared (output), the digital output
level (V
When reading the PORT register, all pins configured as
analog input channels will read as cleared (a low level).
Pins configured as digital inputs will not convert an
analog input. Analog levels on any pin that is defined as
a digital input (including the ANx pins) may cause the
input buffer to consume current that exceeds the
device specifications.
10.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically, this instruction
would be a NOP (Example 10-1).
EXAMPLE 10-1:
DS39951C-page 122
MOV
MOV
NOP
BTSS
OH
0xFF00, W0
W0, TRISB
PORTB, #13
Configuring Analog Port Pins
or V
OPEN-DRAIN CONFIGURATION
I/O PORT WRITE/READ TIMING
OL
IH
) will be converted.
specification.
PORT WRITE/READ EXAMPLE
DD
(e.g., 5V) on any desired
; Configure PORTB<15:8> as inputs
; and PORTB<7:0> as outputs
; Delay 1 cycle
; Next Instruction
10.2.2
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Pins that are
used as digital only inputs are able to handle DC
voltages up to 5.5V, a level typical for digital logic
circuits. In contrast, pins that also have analog input
functions of any kind can only tolerate voltages up to
V
should be avoided.
Table 10-1 summarizes the input voltage capabilities.
Refer to Section 28.0 “Electrical Characteristics” for
more details.
TABLE 10-1:
PORTA<4:0>
PORTB<15:12>
PORTB<4:0>
PORTC<3:0>
PORTA<10:7>
PORTB<11:7>
PORTB<6:5>
PORTC<9:4>
Note 1:
DD
Port or Pin
. Voltage excursions beyond V
Not available on 28-pin devices.
ANALOG INPUT PINS AND
VOLTAGE CONSIDERATIONS
(1)
(1)
(1)
INPUT VOLTAGE TOLERANCE
Tolerated
Input
5.5V
V
 2010 Microchip Technology Inc.
DD
Only V
tolerated.
Tolerates input levels
above V
most standard logic.
DD
Description
DD
DD
on these pins
input levels
, useful for