PIC18F46J50-I/ML Microchip Technology, PIC18F46J50-I/ML Datasheet - Page 32

IC PIC MCU FLASH 64KB 44-QFN

PIC18F46J50-I/ML

Manufacturer Part Number
PIC18F46J50-I/ML
Description
IC PIC MCU FLASH 64KB 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F46J50-I/ML

Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Timers
2
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136, MA180024, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Package
44QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
A/d Bit Size
10 bit
A/d Channels Available
13
Height
0.88 mm
Length
8 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.15 V
Width
8 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F46J50-I/ML
Manufacturer:
Microchip Technology
Quantity:
1 830
Part Number:
PIC18F46J50-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F46J50 FAMILY
2.2.3
The EC and ECPLL Oscillator modes require an
external clock source to be connected to the OSC1 pin.
There is no oscillator start-up time required after a
Power-on Reset (POR) or after an exit from Sleep
mode.
In the EC Oscillator mode, the oscillator frequency
divided by 4 is available on the OSC2 pin. In the ECPLL
Oscillator mode, the PLL output divided by 4 is
available on the OSC2 pin This signal may be used for
test purposes or to synchronize other logic. Figure 2-3
displays the pin connections for the EC Oscillator
mode.
FIGURE 2-3:
2.2.4
PIC18F46J50 Family devices include a PLL circuit.
This is provided specifically for USB applications with
lower speed oscillators and can also be used as a
microcontroller clock source.
The PLL can be enabled in HSPLL, ECPLL,
INTOSCPLL and INTOSCPLLO Oscillator modes by
setting the PLLEN bit (OSCTUNE<6>). It is designed
to produce a fixed 96 MHz reference clock from a
fixed 4 MHz input. The output can then be divided and
used for both the USB and the microcontroller core
clock. Because the PLL has a fixed frequency input
and output, there are eight prescaling options to
match the oscillator input frequency to the PLL. This
prescaler allows the PLL to be used with crystals, res-
onators and external clocks, which are integer multiple
frequencies of 4 MHz. For example, a 12 MHz crystal
could be used in a prescaler divide by three mode to
drive the PLL.
DS39931C-page 32
Clock from
Ext. System
EXTERNAL CLOCK INPUT
PLL FREQUENCY MULTIPLIER
F
OSC
/4
EXTERNAL CLOCK INPUT
OPERATION (EC AND
ECPLL CONFIGURATION)
OSC1/CLKI
OSC2/CLKO
PIC18F46J50
There is also a CPU divider, which can be used to derive
the microcontroller clock from the PLL. This allows the
USB peripheral and microcontroller to use the same
oscillator input and still operate at different clock speeds.
The CPU divider can reduce the incoming frequency by
a factor of 1, 2, 3 or 6.
2.2.5
The PIC18F46J50 Family devices include an internal
oscillator block which generates two different clock
signals; either can be used as the microcontroller’s
clock source. The internal oscillator may eliminate the
need for external oscillator circuits on the OSC1 and/or
OSC2 pins.
The main output (INTOSC) is an 8 MHz clock source
which can be used to directly drive the device clock. It
also drives the INTOSC postscaler which can provide a
range of clock frequencies from 31 kHz to 8 MHz.
Additionally, the INTOSC may be used in conjunction
with the PLL to generate clock frequencies up to
48 MHz.
The other clock source is the internal RC oscillator
(INTRC) which provides a nominal 31 kHz output.
INTRC is enabled if it is selected as the device clock
source. It is also enabled automatically when any of the
following are enabled:
• Power-up Timer
• Fail-Safe Clock Monitor
• Watchdog Timer
• Two-Speed Start-up
These features are discussed in larger detail in
Section 26.0 “Special Features of the CPU”.
The clock source frequency (INTOSC direct, INTRC
direct or INTOSC postscaler) is selected by configuring
the IRCF bits of the OSCCON register (page 37).
INTERNAL OSCILLATOR BLOCK
© 2009 Microchip Technology Inc.

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