DSPIC33FJ64GS406-I/MR Microchip Technology, DSPIC33FJ64GS406-I/MR Datasheet
DSPIC33FJ64GS406-I/MR
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DSPIC33FJ64GS406-I/MR Summary of contents
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... Revision ID value appear in the Output window. Note: If you are unable to extract the silicon revision level, please contact your local Microchip sales office for assistance. page 7, The DEVREV dsPIC33FJ32GS406/606/608/610 dsPIC33FJ64GS406/606/608/610 silicon revisions are shown in Table (1) Device ID 0x4000 0x4002 0x4004 0x4006 0x4001 0x4003 ...
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... TABLE 2: SILICON ISSUE SUMMARY Item Module Feature Number ECAN WAKIF bit 1. Reserved — 2. SPI ASS1 Pin 3. JTAG Boundary Scan 4. PWM Secondary 5. Master Time Base Synchronization Interrupts Exit from Doze 6. Mode on Interrupt ADC Current 7. Consumption in Sleep Mode PWM External Period 8 ...
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... Silicon Errata Issues Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. The shaded column in the “Affected Silicon Revisions” table included in each issue indicates that the issue applies to the most current revision of silicon (A0) ...
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... Module: Interrupts ® When the dsPIC DSC device is operating in Doze mode, any interrupt should trigger the device to exit Doze mode and generate an interrupt request (IRQ) regardless of the interrupt priority level. However, if the interrupt priority level is lower than the CPU priority level, the interrupt request will not be generated ...
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... Module: High Speed PWM The PENH and PENL bits in the IOCONx register are used to assign ownership of the pins to either the PWM module or the GPIO module. The correct procedure to configure the PWM module is to first assign pin ownership to the PWM module and then enabling it using the PTEN bit in the PTCON register ...
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... Module: ECAN The ERRIF status flag (CiINTF<5>) does not get set when a CAN error condition occurs. However, the corresponding CiIF interrupt flag will get set on a CAN error condition, and an interrupt will be correctly generated if enabled. Work around Do not inspect the state of the ERRIF bit to deter- mine if a CAN error interrupt has occurred ...
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... Data Sheet Clarifications The following typographic corrections and clarifications are to be noted for the latest version of the device data sheet (DS70591C): Note: Corrections are shown in bold. Where possible, the original bold text formatting has been removed for clarity. ...
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... APPENDIX A: REVISION HISTORY Rev A Document (10/2009) Initial release of this document; issued for revision A0. Includes silicon issues 1 (ECAN), 2 (SPI), 3 (SPI) 4 (JTAG), 5 (PWM) and 6 (Interrupts). Rev B Document (6/2010) Removed silicon issue 2 (SPI) and marked its location as reserved. Updated the work around in silicon issue 5 (PWM). ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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