PIC24FJ128GA010-I/PT Microchip Technology, PIC24FJ128GA010-I/PT Datasheet - Page 35

• Manufacturer Part Number: PIC24FJ128GA010-I/PT
• Description: IC PIC MCU FLASH 128K 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA010-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 84
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164333 - MODULE SKT FOR PM3 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

FIGURE 5-3:
5.2
The programming executive command set is shown in
Table 5-1. This table contains the opcode, mnemonic,
length, time-out and description for each command.
Functional details on each command are provided in
Section 5.2.4 “Command Descriptions”.
5.2.1
All programming executive commands have a general
format consisting of a 16-bit header and any required
data for the command (see Figure 5-4). The 16-bit
header consists of a 4-bit opcode field, which is used to
identify the command, followed by a 12-bit command
length field.
FIGURE 5-4:
The command opcode must match one of those in the
command set. Any command that is received which
does not match the list in Table 5-1 will return a “NACK”
response (see Section 5.3.1.1 “Opcode Field”).
The command length is represented in 16-bit words
since the SPI operates in 16-bit mode. The program-
ming executive uses the command length field to
determine the number of words to read from the SPI
port. If the value of this field is incorrect, the command
will not be properly received by the programming
executive.
© 2008 Microchip Technology Inc.
15
Opcode
Command Data First Word (if required)
Command Data Last Word (if required)
PGCx
PGDx
Programming Executive
Commands
12
COMMAND FORMAT
11
1
MSB X X X LSB
Last Command Word
PGCx = Input
PGDx = Input
2
Host Transmits
PROGRAMMING EXECUTIVE – PROGRAMMER COMMUNICATION PROTOCOL
COMMAND FORMAT
15 16
•
•
Length
P8
Programming Executive
Processes Command
P9
PGCx = Input (Idle)
1
PGDx = Output
0
0
P20
5.2.2
When 24-bit instruction words are transferred across
the 16-bit SPI interface, they are packed to conserve
space using the format shown in Figure 5-5. This
format minimizes traffic over the SPI and provides the
programming executive with data that is properly
aligned for performing table write operations.
FIGURE 5-5:
5.2.3
The
unsupported commands. Additionally, due to the
memory constraints of the programming executive, no
checking is performed on the data contained in the
programmer command. It is the responsibility of the
programmer to command the programming executive
with valid command arguments or the programming
operation may fail. Additional information on error
handling is provided in Section 5.3.1.3 “QE_Code
Field”.
LSWx: Least Significant 16 bits of instruction word
MSBx: Most Significant Bytes of instruction word
Note:
PIC24FJXXXGA0XX
15
programming
1
MSB X X X LSB
2
MSB2
PACKED DATA FORMAT
When the number of instruction words
transferred is odd, MSB2 is zero and
LSW2 can not be transmitted.
PROGRAMMING EXECUTIVE
ERROR HANDLING
Host Clocks Out Response
15 16
PGDx = Output
PGCx = Input
PACKED INSTRUCTION
WORD FORMAT
executive
P21
LSW1
LSW2
8 7
1
MSB X X X LSB
2
will
DS39768D-page 35
15 16
MSB1
“NACK”
0
all