PIC18F2523-I/ML Microchip Technology, PIC18F2523-I/ML Datasheet - Page 11

• Manufacturer Part Number: PIC18F2523-I/ML
• Description: IC PIC MCU FLASH 16KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2523-I/ML

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1536Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/USART
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.4
Figure 2-10
programming process. First, a Bulk Erase is performed.
Next, the code memory, ID locations and data EEPROM
are programmed (selected devices only, see
“Data EEPROM
then verified to ensure that programming was successful.
If no errors are detected, the Configuration bits are then
programmed and verified.
FIGURE 2-10:
 2010 Microchip Technology Inc.
Note 1:
High-Level Overview of the
Programming Process
shows the high-level overview of the
Selected devices only, see
“Data EEPROM
Programming”). These memories are
Program Data EE
Configuration Bits
Program Memory
Configuration Bits
Verify Program
Perform Bulk
Program IDs
Verify Data
Verify IDs
Program
HIGH-LEVEL
PROGRAMMING FLOW
Erase
Verify
Done
Start
Programming”.
(1)
Section 3.3
Section 3.3
PIC18F2XXX/4XXX FAMILY
2.5
As shown in
Program/Verify mode is entered by holding PGC and
PGD low and then raising MCLR/V
(high voltage). Once in this mode, the code memory,
data EEPROM (selected devices only, see
“Data EEPROM
Configuration bits can be accessed and programmed in
serial fashion.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high-impedance
state.
FIGURE 2-11:
FIGURE 2-12:
MCLR/V
V
PGD
PGC
MCLR/V
D110
V
PGD
PGC
DD
DD
Entering and Exiting High-Voltage
ICSP Program/Verify Mode
D110
PP
PP
Figure 2-12
/RE3
/RE3
Figure
Programming”), ID locations and
PGD = Input
PGD = Input
P13
P1
ENTERING HIGH-VOLTAGE
PROGRAM/VERIFY MODE
EXITING HIGH-VOLTAGE
PROGRAM/VERIFY MODE
2-11, the High-Voltage ICSP
P16
shows the exit sequence.
P1
P12
P17
DS39622L-page 11
PP
/RE3 to V
Section 3.3
IHH