ATMEGA16-16MU Atmel, ATMEGA16-16MU Datasheet - Page 23

IC AVR MCU 16K 16MHZ 5V 44-QFN

ATMEGA16-16MU

Manufacturer Part Number
ATMEGA16-16MU
Description
IC AVR MCU 16K 16MHZ 5V 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA16-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Interface Type
JTAG/SPI/UART
Total Internal Ram Size
1KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
MLF
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Package
44MLF
Family Name
ATmega
Maximum Speed
16 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
I/O Memory
2466T–AVR–07/10
EEPROM data corruption can easily be avoided by following this design recommendation:
The I/O space definition of the ATmega16 is shown in
All ATmega16 I/Os and peripherals are placed in the I/O space. The I/O locations are accessed
by the IN and OUT instructions, transferring data between the 32 general purpose working regis-
ters and the I/O space. I/O Registers within the address range $00 - $1F are directly bit-
accessible using the SBI and CBI instructions. In these registers, the value of single bits can be
checked by using the SBIS and SBIC instructions. Refer to the Instruction Set section for more
details. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must
be used. When addressing I/O Registers as data space using LD and ST instructions, $20 must
be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that the CBI and SBI
instructions will operate on all bits in the I/O Register, writing a one back into any flag read as
set, thus clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only.
The I/O and Peripherals Control Registers are explained in later sections.
Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This
can be done by enabling the internal Brown-out Detector (BOD). If the detection level of the
internal BOD does not match the needed detection level, an external low V
tion circuit can be used. If a reset occurs while a write operation is in progress, the write
operation will be completed provided that the power supply voltage is sufficient.
“Register Summary” on page
ATmega16(L)
CC
Reset Protec-
331.
23

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