DSPIC33FJ128GP802-E/SO Microchip Technology, DSPIC33FJ128GP802-E/SO Datasheet - Page 291

• Manufacturer Part Number: DSPIC33FJ128GP802-E/SO
• Description: IC DSPIC MCU/DSP 128K 28-SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128GP802-E/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b, D/A 4x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 128KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 10-chx10-bit|10-chx12-bit
• On-chip Dac: 2-chx16-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

26.0
The Parallel Master Port (PMP) module is a parallel
8-bit I/O module, specifically designed to communi-
cate with a wide variety of parallel devices, such as
communication peripherals, LCDs, external memory
FIGURE 26-1:
© 2011 Microchip Technology Inc.
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
Note 1: This data sheet summarizes the features
Parallel Master Port
Note 1: 28-pin devices do not have PMA<10:2>.
2: Some registers and associated bits
PARALLEL MASTER PORT
(PMP)
dsPIC33F
of
dsPIC33FJ64GPX02/X04,
dsPIC33FJ128GPX02/X04 families of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to “Section 35. Parallel Master
Port
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to
“Memory Organization”
sheet for device-specific register and bit
information.
the
(PMP)”
PMP MODULE OVERVIEW
dsPIC33FJ32GP302/304,
(DS70299)
in this data
Section 4.0
PMA<0>
PMALL
PMA<1>
PMALH
PMA<10:2>
PMCS1
PMBE
PMRD
PMRD/PMWR
PMWR
PMENB
PMD<7:0>
PMA<7:0>
PMA<10:8>
PMA<14>
of
and
the
(1)
Microcontroller
devices and microcontrollers. Because the interface
to parallel peripherals varies significantly, the PMP is
highly configurable.
Key features of the PMP module include:
• Fully multiplexed address/data mode
• Demultiplexed or partially multiplexed address/
• One Chip Select Line
• Programmable Strobe Options
• Address Auto-Increment/Auto-Decrement
• Programmable Address/Data Multiplexing
• Programmable Polarity on Control Signals
• Legacy Parallel Slave Port Support
• Enhanced Parallel Slave Support:
• Programmable Wait States
• Selectable Input Voltage Levels
data mode:
- Up to 11 address lines with single chip select
- Up to 12 address lines without chip select
- Individual Read and Write Strobes or;
- Read/Write Strobe with Enable Strobe
- Address Support
- 4-Byte Deep Auto-Incrementing Buffer
Up to 11-Bit Address
8-Bit Data
LCD
Address Bus
Data Bus
Control Lines
Buffer
FIFO
DS70292E-page 291
EEPROM