PIC18F442-I/L Microchip Technology, PIC18F442-I/L Datasheet

IC MCU FLASH 8KX16 EE A/D 44PLCC

PIC18F442-I/L

Manufacturer Part Number
PIC18F442-I/L
Description
IC MCU FLASH 8KX16 EE A/D 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F442-I/L

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Controller Family/series
PIC18
No. Of I/o's
34
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
MSSP, SPI, I2C, PSP, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Package
44PLCC
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164309 - MODULE SKT FOR PM3 44PLCCXLT44L2 - SOCKET TRAN ICE 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCCDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
 Details
Other names
PIC18F442I/L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F442-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
The PIC18FXX2 Rev. B5 parts you have received con-
form
(DS39564B), except for the anomalies described
below.
All the issues listed here will be addressed in future
revisions of the PIC18FXX2 silicon.
The
PIC18FXX2 devices with these Device/Revision
IDs:
1. Module: Program Memory
© 2005 Microchip Technology Inc.
The Device IDs (DEVID1 and DEVID2) are located at
addresses
configuration space. They are shown in hexadecimal
in the format “DEVID2 DEVID1”.
Part Number
PIC18F242
PIC18F252
PIC18F442
PIC18F452
Data corruption may occur during a table write
operation if a peripheral interrupt also occurs. This
happens only when the interrupt enable bit (PIE or
INTCON register) for the corresponding interrupt
has also been set.
Work around
Before executing any table write instructions, dis-
able ALL peripheral interrupts. This is best done by
clearing all interrupt enable bits in the three Inter-
rupt Control registers (INTCON, INTCON2 and
INTCON3) and both Peripheral Interrupt Enable
registers (PIE1 and PIE2). After the table write is
complete, restore all INTCON and PIE registers to
their pre-instruction state.
Date Codes that pertain to this issue:
All engineering and production devices.
following
functionally
PIC18FXX2 Rev. B5 Silicon/Data Sheet Errata
3FFFFEh:3FFFFFh
silicon
00 0100 100
00 0100 000
00 0100 101
00 0100 001
to
Device ID
the
errata apply
Device
in
Revision ID
the
Data
00110
00110
00110
00110
only
device’s
Sheet
to
2. Module: Data EEPROM
EXAMPLE 1:
BCF
BSF
MOVF
BSF
When reading the data EEPROM, the contents of
the EEDATA register may become corrupted in the
second instruction cycle after the RD bit
(EECON1<0>) is set. The actual contents of the
EEPROM remains unaffected.
Work around
To ensure the integrity of the contents of EEDATA,
the register must be read in the instruction imme-
diately following the setting of the RD bit. Use the
MOVF or MOVFF instructions to do this (see
Example 1).
Additionally, all interrupts must be disabled prior to
the read instruction sequence. Interruptions of the
sequence may have the same result of altering the
contents of EEDATA.
Date Codes that pertain to this issue:
All engineering and production devices.
PIC18FXX2
INTCON,GIEH ;disable interrupts
EECON1,RD
EEDATA,W
INTCON,GIEH ;enable interrupts
SUGGESTED SEQUENCE
FOR READING EEDATA
;if using interrupts
;start the read operation
;move the data out of
;EEDATA
;if using interrupts
DS80150D-page 1

Related parts for PIC18F442-I/L

PIC18F442-I/L Summary of contents

Page 1

... PIC18FXX2 devices with these Device/Revision IDs: Part Number Device ID PIC18F242 00 0100 100 PIC18F252 00 0100 000 PIC18F442 00 0100 101 PIC18F452 00 0100 001 The Device IDs (DEVID1 and DEVID2) are located at addresses 3FFFFEh:3FFFFFh in configuration space. They are shown in hexadecimal in the format “DEVID2 DEVID1”. ...

Page 2

... Write to EEADR at least one instruction cycle before setting the RD bit. The instruction between the write to EEADR and the read can be any valid instruction, including a NOP. Date Codes that pertain to this issue: All engineering and production devices. © 2005 Microchip Technology Inc. over ID locations bytes ...

Page 3

... Significant bits while the BSR points to Bank 15 (BSR = 0Fh). Date Codes that pertain to this issue: All engineering and production devices. © 2005 Microchip Technology Inc. PIC18FXX2 7. Module: MSSP (SPI, Slave Mode) In its current implementation, the SS (Slave Select) control signal generated by an external master processor may not be successfully recog- ® ...

Page 4

... Affected systems will repeatably fail normal testing. Systems not affected will continue to not be affected over time. Work around Insert a NOP instruction at address 0x0000. Date Codes that pertain to this issue: All engineering and production devices. © 2005 Microchip Technology Inc. ...

Page 5

... Sleep mode, with all I/O pins in hi-impedance state and tied to V features that add delta current disabled (such as WDT, Timer1 Oscillator, BOR,...). 4: For RC osc configuration, current through R estimated by the formula © 2005 Microchip Technology Inc. Standard Operating Conditions (unless otherwise stated) -40°C ≤ T Operating temperature Standard Operating Conditions (unless otherwise stated) -40° ...

Page 6

... PIC18FXX2 2. Module: Packaging (Pinout and Product Identification) PIC18F442 and PICF452 devices are now offered in 44-pin, near chip-scale micro lead frame packages (commonly known as “QFN”). This packaging type has been added to the product line since the latest revision of the Device Data Sheet. ...

Page 7

... TABLE 1-3: PIC18F442/452 PINOUT I/O DESCRIPTIONS Pin Number Pin Name DIP PLCC QFN TQFP MCLR MCLR — 32 OSC1/CLKI OSC1 CLKI OSC2/CLKO/RA6 14 15 OSC2 CLKO RA6 RA0/AN0 RA0 AN0 RA1/AN1 RA1 AN1 RA2/AN2 REF RA2 AN2 V - REF RA3/AN3 REF RA3 AN3 V + REF ...

Page 8

... PIC18FXX2 TABLE 1-3: PIC18F442/452 PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Number Pin Name DIP PLCC QFN TQFP RB0/INT0 33 36 RB0 INT0 RB1/INT1 RB1 INT1 RB2/INT2 RB2 INT2 RB3/CCP2 RB3 CCP2 RB4 RB5/PGM RB5 PGM RB6/PGC RB6 PGC RB7/PGD RB7 PGD Legend: TTL = TTL compatible input ...

Page 9

... TABLE 1-3: PIC18F442/452 PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Number Pin Name DIP PLCC QFN TQFP RC0/T1OSO/T1CKI RC0 T1OSO T1CKI RC1/T1OSI/CCP2 RC1 T1OSI CCP2 RC2/CCP1 RC2 CCP1 RC3/SCK/SCL RC3 SCK SCL RC4/SDI/SDA RC4 SDI SDA RC5/SDO RC5 SDO RC6/TX/ RC6 TX CK RC7/RX/DT ...

Page 10

... PIC18FXX2 TABLE 1-3: PIC18F442/452 PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Number Pin Name DIP PLCC QFN TQFP RD0/PSP0 RD1/PSP1 RD2/PSP2 RD3/PSP3 RD4/PSP4 27 30 RD5/PSP5 28 31 RD6/PSP6 29 32 RD7/PSP7 30 33 RE0/RD/AN5 RE0 RD AN5 RE1/WR/AN6 RE1 WR AN6 RE2/CS/AN7 RE2 CS AN7 V 12 11 — ...

Page 11

... Parameter Notes: 1. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M 2. REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M JEDEC equivalent: M0-220 Drawing No. C04-103 © 2005 Microchip Technology Inc. EXPOSED METAL PAD ...

Page 12

... Rev B Document (3/2003) Added silicon issues 6, 7 and 8 (MSSP and Core - Instruction Set) and data sheet clarification 2 (Packaging - Pinout and Product Identification). Rev C Document (7/2003) Added silicon issue 9 (Timer1 Oscillator). Rev D Document (05/2005) Added silicon issue 10 (Reset). DS80150D-page 12 © 2005 Microchip Technology Inc. ...

Page 13

... PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 14

... Fax: 65-6334-8850 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Taiwan - Hsinchu Tel: 886-3-572-9526 Fax: 886-3-572-6459 © 2005 Microchip Technology Inc. EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Ballerup Tel: 45-4450-2828 Fax: 45-4485-2829 France - Massy Tel: 33-1-69-53-63-20 ...

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