AT89C51RC2-RLTUL Atmel, AT89C51RC2-RLTUL Datasheet - Page 85

• Manufacturer Part Number: AT89C51RC2-RLTUL
• Description: IC 8051 MCU FLASH 32K 44VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RC2-RLTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1280 B
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Reduced EMI Mode
4180E–8051–10/06
The ALE signal is used to demultiplex address and data buses on port 0 when used with
external program or data memory. Nevertheless, during internal code execution, ALE
signal is still generated. In order to reduce EMI, ALE signal can be disabled by setting
AO bit.
The AO bit is located in AUXR register at bit location 0.As soon as AO is set, ALE is no
longer output but remains active during MOVX and MOVC instructions and external
fetches. During ALE disabling, ALE pin is weakly pulled high.
Table 64. AUXR Register
AUXR - Auxiliary Register (8Eh)
Number
DPU
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
EXTRAM
XRS1
XRS0
DPU
Bit
M0
AO
6
-
-
-
Disable Weak Pull-up
Cleared to activate the permanent weak pull up when latch data is logic 1
Set to disactive the weak pull-up.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Pulse Length
Cleared to stretch MOVX control: the RD and the WR pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD and the WR pulse length is 30 clock
periods.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
XRAM Size
XRS1 XRS0
0
0
1
1
EXTRAM Bit
Cleared to access internal XRAM using movx @ Ri @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
ALE Output Bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used). (default) Set, ALE is active only during a MOVX or MOVC
instruction is used.
M0
5
0
1
0
1
XRAM size
256 Bytes (default)
512 Bytes
768 Bytes
1024 Bytes
4
-
XRS1
3
AT89C51RB2/RC2
XRS0
2
EXTRAM
1
AO
0
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